We describe a hardware-oriented design of a complex division algorithm proposed in .6 This algorithm is similar to a radix-r digit-recurrence division algorithm with real operands and prescaling. Prescaling of complex operands allows efficient selec
On adapte l’algorithme de division it´erative de base r `a la division complexe. Par une mise `a l’´echelle pr´eliminaire des op´erandes, on fait en sorte que le choix, `a chaque it´eration, des chiffres de quotient soit ´el´ementaire. Ceci conduit
A n ov el d iv ider bas ed on dual 2b it alg or ithm and it s V LSI im plemen tati on are pres en ted. C om pared w ith the d iv ider o f MI PS m icr opr ocess or ,it decreas es the av erag e ex ecu ting cy cles by 5215 % wh ile it s max imum delay
