IEEE Standard for Verilog ® Hardware Descr iption Language IEEE Std 1364™-2005 (Revision of IEEE Std 1364-2001) I E E E 3 Park Avenue New York, NY 10016-5997, USA 7 April 2006 ———————————————————————————————————— verilog标准的最终版，再后面就被Systemverilog取代了
1800-2009 - IEEE Standard for SystemVerilog--Unified Hardware Design, Specification, and Verification Language (Active)
IEEE标准1800-2009，是2009年发布的SystemVerilog语言标准。目前该标准的状态是Active。
This standard represents a merger of two previous standards: IEEE St
1364-1995 - IEEE Standard Hardware Descr iption Language Based on the Verilog(R) Hardware Descr iption Language (Superseded)
IEEE标准1364-1995，是1995年发布的Verilog HDL语言标准。目前该标准的状态是Superseded，已被IEEE 1364-2001取代。
1364.1-2002 - IEEE Standard for Verilog Register Transfer Level Synthesis (Inactive - Withdrawn)
IEEE标准1364.1-2002，适用于Verilog的寄存器传输级（Register Transfer Level）综合标准。目前该标准的状态是Inactive、Withdraw。
