7系列FPGA使用MIG生成DDR2的IP核的过程介绍和IP功能详细介绍

Zynq-7000 AP SoC and 7 Series Devices Memory Interface Solutions v4.2

7Series_MIS 7Series_MIS DDR3 and DDR2 SDRAMs This section discusses the features, applications, and functional descr iption of Xilinx 7 series FPGAs memory interface solutions in DDR3 and DDR2 SDRAMs. These solutions are available with an optional AX