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  1. Finite State Machine Datapath Design, Optimization, and Implementation

  2. 经典的数据通道设计入门教程 Finite State Machine Datapath Design, Optimization, and Implementation explores the design space of combined FSM/Datapath implementations. The lecture starts by examining performance issues in digital systems such as clock skew and its
  3. 所属分类:硬件开发

    • 发布日期:2010-01-07
    • 文件大小:2097152
    • 提供者:cauchy911
  1. 基于FPGA的可重构计算RECONFIGURABLE COMPUTING THE THEORY AND PRACTICE OF FPGA-BASED COMPUTATION

  2. In the two decades since field-programmable gate arrays (FPGAs) were introduced, they have radically changed the way digital logic is designed and deployed. By marrying the high performance of application-specific integrated circuits (ASICs) and the
  3. 所属分类:硬件开发

    • 发布日期:2010-03-17
    • 文件大小:8388608
    • 提供者:cauchy911
  1. Multiprocessor Systems-on-Chips

  2. This book had its origins in the Multiprocessor System-on-Chip (MPSoC) Workshop, which has been held every summer since 2001. We started the workshop to bring together a broad range of people who need to be involved in SoC design. MPSoCs are much mo
  3. 所属分类:其它

    • 发布日期:2010-04-01
    • 文件大小:4194304
    • 提供者:bluecarp
  1. Introduction to ASICs

  2. The difference between full-custom and semicustom ASICs • The difference between standard-cell, gate-array, and programmable ASICs • ASIC design flow • Design economics • ASIC cell library
  3. 所属分类:其它

    • 发布日期:2010-04-27
    • 文件大小:2097152
    • 提供者:chinaren1945
  1. Perl To Python Migration

  2. The first section of Perl to Python Programming will show you the basic layout and approach of the two languages whilst the second section moves on to the specific differences of using Python data types and objects over Perl variables. The book then
  3. 所属分类:Python

    • 发布日期:2008-03-03
    • 文件大小:436224
    • 提供者:yazero
  1. Verilog HDL 教學文件

  2. Verilog HDL是一種硬體描述語言(hardware descr iption language),為了製作数字电路而用來描述ASICs和FPGA的設計之用。Verilog 的設計者想要以 C 程式語言為基礎設計一種語言,可以使工程師比較容易學習。
  3. 所属分类:C

    • 发布日期:2010-11-14
    • 文件大小:2097152
    • 提供者:JimmyHuang0524
  1. The Design Warrior’s Guide to FPGAs

  2. This is something of a curious, atypical book for the technical genre (and as the author, I should know). I say this because this tome is intended to be of interest to an unusually broad and diverse readership. The primary audience comprises fully f
  3. 所属分类:硬件开发

    • 发布日期:2010-11-15
    • 文件大小:4194304
    • 提供者:wolfhunterhu
  1. Designing-Synthesizing- and Simulating ASICs and FPGAs using VHDL or Verilog

  2. A Practical Guide for Designing, Synthesizing, and Simulating ASICs and FPGAs using VHDL or Verilog 最为经典的讲述VHDL以及Verilog 设计的宝典书籍!设计范例涵盖很多设计中经常用的设计模块,堪称IC设计的 “词典”, 书中的很多范例都可以作为你设计应用中的IP进行应用!!
  3. 所属分类:其它

    • 发布日期:2011-10-03
    • 文件大小:39845888
    • 提供者:c00lb0ycw
  1. Nanometer CMOS ICs - From basics to ASICs.pdf

  2. Nanometer CMOS ICs - From basics to ASICs.pdf
  3. 所属分类:电子商务

    • 发布日期:2012-06-09
    • 文件大小:42991616
    • 提供者:q123456789098
  1. A Practical Guide for Designing, Synthesizing, and Simulating ASICs

  2. A Practical Guide for Designing, Synthesizing, and Simulating ASICs and FPGAs using VHDL or Verilog.pdf
  3. 所属分类:硬件开发

    • 发布日期:2014-09-29
    • 文件大小:39845888
    • 提供者:mekel
  1. A Practical Guide for Designing, Synthesizing, and Simulating ASICs and FPGAs

  2. A Practical Guide for Designing, Synthesizing, and Simulating ASICs and FPGAs using VHDL or Verilog FPGA和ASIC开发非常有用的一本书,书中以实例讲解了许多开发思想和开发技巧,对提高逻辑设计的工作频率及效率有非常好的指导意义
  3. 所属分类:硬件开发

    • 发布日期:2015-05-14
    • 文件大小:39845888
    • 提供者:u012557434
  1. abbr_ Synthesizing, and Simulating ASICs and FPGAs using VHDL or Verilog.part01

  2. abbr_ Synthesizing, and Simulating ASICs and FPGAs using VHDL or Verilog.part01
  3. 所属分类:硬件开发

    • 发布日期:2008-11-26
    • 文件大小:3145728
    • 提供者:lulu5674
  1. abbr_ Synthesizing, and Simulating ASICs and FPGAs using VHDL or Verilog.part02

  2. abbr_ Synthesizing, and Simulating ASICs and FPGAs using VHDL or Verilog.part02
  3. 所属分类:硬件开发

    • 发布日期:2008-11-26
    • 文件大小:3145728
    • 提供者:lulu5674
  1. abbr_ Synthesizing, and Simulating ASICs and FPGAs using VHDL or Verilog.part04

  2. abbr_ Synthesizing, and Simulating ASICs and FPGAs using VHDL or Verilog.part04
  3. 所属分类:硬件开发

    • 发布日期:2008-11-26
    • 文件大小:3145728
    • 提供者:lulu5674
  1. abbr_ Synthesizing, and Simulating ASICs and FPGAs using VHDL or Verilog.part03

  2. abbr_ Synthesizing, and Simulating ASICs and FPGAs using VHDL or Verilog.part03
  3. 所属分类:硬件开发

    • 发布日期:2008-11-26
    • 文件大小:3145728
    • 提供者:lulu5674
  1. abbr_ Synthesizing, and Simulating ASICs and FPGAs using VHDL or Verilog.part05

  2. abbr_ Synthesizing, and Simulating ASICs and FPGAs using VHDL or Verilog.part05
  3. 所属分类:硬件开发

    • 发布日期:2008-11-26
    • 文件大小:3145728
    • 提供者:lulu5674
  1. abbr_ Synthesizing, and Simulating ASICs and FPGAs using VHDL or Verilog.part06

  2. abbr_ Synthesizing, and Simulating ASICs and FPGAs using VHDL or Verilog.part06
  3. 所属分类:硬件开发

    • 发布日期:2008-11-26
    • 文件大小:3145728
    • 提供者:lulu5674
  1. A.Practical.Guide.for.Designing.Synthesizing.and.Simulating.ASICs.and.FPGAs

  2. A.Practical.Guide.for.Designing.Synthesizing.and.Simulating.ASICs.and.FPGAs.using.VHDL.or.Verilog
  3. 所属分类:讲义

    • 发布日期:2018-07-20
    • 文件大小:48234496
    • 提供者:spicalai
  1. Nanometer CMOS ICs From Basics to ASICs 2ed

  2. CMOS scaling has entered the sub-20nm era. This enables the design of system-ona- chip containingmore than ten billion transistors. However, nanometre level device physics also causes a plethora of new challenges that percolate all the way up to the
  3. 所属分类:讲义

    • 发布日期:2018-07-27
    • 文件大小:24117248
    • 提供者:wang1062807258
  1. ISSCC 2021 Tutorials Silicon Photonics – from Basics to ASICs

  2. Silicon Photonics – from Basics to ASICs
  3. 所属分类:硬件开发

    • 发布日期:2021-03-23
    • 文件大小:10485760
    • 提供者:baiwujushi
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