This document defines the DDR3 SDRAM specification, including features, functionalities, AC and DC characteristics, packages, and ball/signal assignments. The purpose of this Specification is to define the minimum set of requirements for JEDEC compl
This document defines the DDR3 SDRAM specification, including features, functionalities, AC and DC characteristics, packages, and ball/signal assignments. The purpose of this Specification is to define the minimum set of requirements for JEDEC compl
This document defines the DDR3 SDRAM specification, including features, functionalities, AC and DC characteristics, packages, and ball/signal assignments. The purpose of this Specification is to define the minimum set of requirements for JEDEC compl
This document defines the LPDDR2 standard, including features, functionalities, AC and DC characteristics, packages, and ball/signal assignments. This standard covers the following technologies: LPDDR2-S2A, LPDDR2-S2B, LPDDR2-S4A, LPDDR2-S4B, LPDDR2
The JESD79-3 document defines DDR3L SDRAM, including features, functionalities, AC and DC characteristics, packages, and ball/signal assignments with the exception of what is stated within this standard.
JESD79-3-1A-01_DDR3L_May_2013, Addendum No. 1 to JESD79‐3 ‐ 1.35 V DDR3L‐800, DDR3L‐1066, DDR3L‐1333, DDR3L‐1600, and (Minor Editorial Revision of JESD79‐3‐1A, January 2013) DDR3L‐1866, (Minor Editorial Revision of JESD79‐3‐1A, January 2013)
The JESD79-3 document defines DDR3L SDRAM, including features, functionalities, AC and DC characteristics, packages, and ball/signal assignments with the exception of what is stated within this standard.
Altera公司宣布，Stratix:registered: III FPGA的DDR3存储器接口速率超过1067 Mbps，存储器性能比竞争FPGA解决方案高出33%。更宽的存储器带宽支持新的通信、计算和视频处理应用，以前很难实现这类应用或者需要增加存储器块才能实现。Altera的Stratix III FPGA系列是业界唯一完全符合JESD79-3 JEDEC DDR3 SDRAM标准的FPGA，该标准包括为提高性能而制定的高性能读写均衡规范。
Altera高端产品营销资深总监Dav
