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TABLE OF CONTENTS Preface xiii I. Introduction 1 1. Preparing for the Worst 3 My Dad Was Right 3 Developing a Disaster Recovery Plan 4 Step 1: Define (Un)acceptable Loss 5 Step 2: Back Up Everything 7 Step 3: Organize Everything 10 Step 4: Protect A
This paper describes the design of the first 10-Gb/s CMOS clock and data recovery (CDR) circuit. A linear phase detector (PD) is introduced that compares the phase of the incoming data with that of a half-rate clock. The CDR circuit also incorporate
