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  1. 经典国外IC设计经典书

  2. Advanced.ASIC.Chip.Synthesis.Using.Synopsys.Design.Compiler.Physical.Compiler.and.Primetime.2nd.Ed.pdf
  3. 所属分类:硬件开发

    • 发布日期:2014-09-29
    • 文件大小:2097152
    • 提供者:mekel
  1. embedded system design modeling synthesis and verification

  2. embedded system design modeling synthesis and verification
  3. 所属分类:嵌入式

    • 发布日期:2014-10-09
    • 文件大小:4194304
    • 提供者:hqzhu0913
  1. Synthesis of a single cycle of light with compact erbium-doped fibre technology

  2. 光谱组合实现单周期超短脉冲,该文章发表在Nature Photonics上,属于开创性的文章,值得借鉴!
  3. 所属分类:电信

    • 发布日期:2014-11-17
    • 文件大小:595968
    • 提供者:disidai
  1. 斯坦福大学-Computer Graphics Image Synthesis Techniques

  2. Computer Graphics Image Synthesis Techniques
  3. 所属分类:C++

    • 发布日期:2015-02-07
    • 文件大小:17825792
    • 提供者:scorpio172
  1. Verilog-2001 Behavioral and Synthesis Enhancements

  2. The Verilog 2001 Standard includes a number of enhancements that are targeted at simplifying designs improving designs and reducing design errors This paper details important enhancements that were added to the Verilog 2001 Standard that are intende
  3. 所属分类:硬件开发

    • 发布日期:2015-03-07
    • 文件大小:67584
    • 提供者:peyed
  1. integrated circuit design for high-speed frequency synthesis

  2. foster dai大牛写的一本,通俗易懂,很适合设计的时候来作为参考。
  3. 所属分类:专业指导

    • 发布日期:2015-03-22
    • 文件大小:12582912
    • 提供者:liumeng303848
  1. FUNCTIONAL DECOMPOSITION WITH APPLICATION TO FPGA SYNTHESIS

  2. Organization of the book. The first chapter gives basic definitions and notations for Boolean functions, which are used in the following chapters. Basic notations for circuits and Boolean expressions are also given in the first two sections .. Reade
  3. 所属分类:硬件开发

    • 发布日期:2016-05-14
    • 文件大小:24117248
    • 提供者:yp2008gf
  1. Verilog Quickstart--Practical Guide to Simulation & Synthesis in Verilog

  2. Verilog Quickstart--Practical Guide to Simulation & Synthesis in Verilog
  3. 所属分类:硬件开发

    • 发布日期:2016-08-24
    • 文件大小:6291456
    • 提供者:wilfred2k9
  1. ADVANCED ASIC CHIP SYNTHESIS

  2. ADVANCED ASIC CHIP SYNTHESIS
  3. 所属分类:硬件开发

    • 发布日期:2016-09-12
    • 文件大小:2097152
    • 提供者:zhanghang976
  1. VHDL:Coding and Logic Synthesis with Synopsys

  2. 详细地介绍了VHDL的工作原理及其具体使用,同时,结合Synopsys综合流程,更能深入理解VHDL电路设计。
  3. 所属分类:硬件开发

    • 发布日期:2017-03-23
    • 文件大小:11534336
    • 提供者:chinahhucai
  1. #GDC2017 Magic Image Upscaling and Material Synthesis using Deep Learning

  2. Recently deep learning has revolutionized computer vision and other recognition problems. Everyday applications using such techniques are now commonplace with more advanced tasks being automated at a growing rate. During 2016, “image synthesis” tech
  3. 所属分类:其它

    • 发布日期:2017-03-29
    • 文件大小:3145728
    • 提供者:wty1009
  1. Verilog HDL - A Guide to Digital Design and Synthesis

  2. Verilog HDL - A Guide to Digital Design and Synthesis 英文版
  3. 所属分类:嵌入式

    • 发布日期:2017-04-01
    • 文件大小:22020096
    • 提供者:a200556220407
  1. Introduction to Logic Synthesis using Verilog HDL

  2. Introduction to Logic Synthesis using Verilog HDL
  3. 所属分类:硬件开发

    • 发布日期:2017-06-25
    • 文件大小:7340032
    • 提供者:lemontreed
  1. Synthesis.Lectures.on.Artificial.Intelligence.and.Machine.Learning.pdf

  2. Morgan.Claypool.Action.Programming.Languages.-.Synthesis.Lectures.on.Artificial.Intelligence.and.Machine.Learning.pdf
  3. 所属分类:机器学习

    • 发布日期:2017-09-01
    • 文件大小:891904
    • 提供者:boymaxzm
  1. Multi-Corner Multi-Mode Synthesis in Design Compiler

  2. While static timing analysis (STA) with PrimeTime®(*) (PT) is always analyzing each individual mode and corner of a design in an individual run (or in case of distributed multi scenario analysis (DMSA) in a separate subprocess), the traditional impl
  3. 所属分类:硬件开发

    • 发布日期:2017-11-20
    • 文件大小:269312
    • 提供者:tiny_stone
  1. Stratigraphy: A Modern Synthesis Authors: Miall, Andrew D.

  2. 2017书籍 Stratigraphy: A Modern Synthesis Authors: Miall, Andrew D.
  3. 所属分类:讲义

    • 发布日期:2017-11-20
    • 文件大小:49283072
    • 提供者:csz0808
  1. Verilog HDL Synthesis A Practical Primer

  2. English PDF version 详细介绍了可综合的Verilog HDL 编程技术
  3. 所属分类:专业指导

    • 发布日期:2008-12-17
    • 文件大小:5242880
    • 提供者:kingfour0523
  1. IEEE论文:Virtual Restoration of Ancient Chinese Paintings

  2. 名字太长了打不下:Virtual Restoration of Ancient Chinese Paintings Using Color Contrast Enhancement and Lacuna Texture Synthesis 文章内容看题目就知道了 作者为国立台湾大学教授、IEEE会员Soo-Chang Pei、国立台湾博士生Yi-Chong Zeng和Realtek半导体公司工程师Ching-Hua Chang
  3. 所属分类:专业指导

    • 发布日期:2009-01-20
    • 文件大小:1048576
    • 提供者:shunjianyu
  1. synthesis guide

  2. 数字电路综合指导,基于SYNOPSYS公司的Design Compiler。
  3. 所属分类:专业指导

    • 发布日期:2009-04-23
    • 文件大小:212992
    • 提供者:philashar
  1. HighLevel Synthesis of Cryptographic Hardware

  2. HighLevel Synthesis Tools 。Cryptol --Functional DomainSpecific Language
  3. 所属分类:网络安全

    • 发布日期:2018-04-09
    • 文件大小:773120
    • 提供者:weixin_41656797
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