说明:This document details all known silicon errata for the P4080 and P4040. The following table provides a revision
history for this document. <liuw666> 上传 | 大小:673kb
说明:The Cavium OCTEON III CN71XX Multicore cnMIPS64 processors are a family of
processors targeted at intelligent networking, wireless, control-plane, and storage
applications. The CN71XX is targeted for many applications, but is particularly wellsuited <liuw666> 上传 | 大小:11mb
说明:Volume 1: Describes the architecture and programming environment of processors supporting IA-32 and Intel® 64 architectures.
Volume 2: Includes the full instruction set reference, A-Z. Describes the format of the instruction and provides referenc <liuw666> 上传 | 大小:24mb
说明:The Intel® 64 and IA-32 Architectures Optimization Reference Manual describes how to optimize software to take advantage of the performance characteristics of IA-32 and Intel 64 architecture processors.
The target audience for this manual includes so <liuw666> 上传 | 大小:10mb
说明:The table describes throughput and latency for processors with two FMA units, assuming all sources come from the FMA unit.
See FMA latency chapter in the optimization guide for more information.
Memory latencies are assuming Data Cache Unit (DCU) hit <liuw666> 上传 | 大小:2mb