说明: architecture behav of codesdect is signal m : integer range 0 to 3; signal sdata : std_logic_vector(2 downto 0); begin cdata<= wavenum; process(clk,clr) begin if clr='1' then m if datain = cdata (2) then m<=1; else m if datain = <baidu_15200011> 在 上传 | 大小:281600