amba_5_chi_architecture_specification_IHI0050B.pdf

文件名称: amba_5_chi_architecture_specification_IHI0050B.pdf

所属分类: 硬件开发

开发工具:

文件大小: 1mb

下载次数: 0

上传时间: 2019-07-14

提供者: yinf****

下载 (1mb)

不能下载？报告错误

详细说明：arm amba总线协议，在移动终端、低功耗领域都离不开arm总线协议。同时承接soc fpga相关项目，需要联系我：18874206254RM AMBA SPECIFICATION LICENCE THIS END USER LICENCE AGREEMENT ("LICENCE")IS A LEGAL AGREEMENT BETWEEN YOU (EITHER SINGLE INDIVIDUAL, OR SINGLE LEGAL ENTITY AND ARM LIMITED (ARM)FOR THE USE OF THE RELEVANT AMBA SPECIFICATION ACCOMPANYING THIS LICENCE. ARM IS ONLY WILLING TO LICENSE THE RELEVANT AMBA SPECIFICATION TO YOU ON CONDITION THAT YOU ACCEPT ALL OF THE TERMS IN THIS LICENCE. BY CLICKING OR OTHERWISE USING OR COPYING THE RELEVANT AMBA SPECIFICATION YOU INDICATE THAT YOU AGREE TO BE BOUND BY ALL THE TERMS OF THIS LICENCE. IF YOU DO NOT AGREE TO TIIE TERMS OF TIIIS LICENCE. ARM IS UNWILLING TO LICENSE TIIE RELEVANT AMBA SPECIFICATION TO YOU AND YOU MAY NOT USE OR COPY THE RELEVANT AMBA SPECIFICATION AND YOU SHOULD PROMPTLY RETURN TIIE RELEVANT AMBA SPECIFICATION TO ARM LICENSEE mcans You and your Subsidiaries Subsidiary' means, if You are a single entity, any company the majority of w hose voting shares is now or hereafter owned or controlled, directly or indirectly, by You. A company shall be a Subsidiary only for the period during which such control exists 1. Subject to the provisions of Clauses 2, 3 and 4, ARM hereby grants to liCenSee a perpetual, non-exclusive, non-transferable, royalty free, worldwide licence to (i) use and copy the relevant AMB. A Specification for the purpose of developing and having developed products that comply with the relevant AMBA Specification (ii) manufacture and have manufactured products which either: (a) have been created by or for LiCENsee under the licence granted in Clause 1(0), or(b) incorporate a product(s)which has been created by a third party(s)under a licence granted by ARM in Clause 1(1of such third party's ARM AMBA Specification Licence: and (ii offer to sell, sell, supply or otherwise distribute products which have either been(a) created by or for LICENSeE under the licence granted in Clause 1(1); or(b)manufactured by or for LICenseE under the licence granted in Clause l(i1) 2. LICENSEE hcrcby agrccs that thc licence granted in Clausc I is subjcct to thc following restrictions ()where a product created under Clause l(i)is an integrated circuit which includes a CPU then either: (a) such CPU shall only e manufactured under licence from ARM; or(b)such CPU is neither substantially compliant with nor marketed as being compliant with the ARM instruction sets licensed by ARM from time to time (ii) the licences granted in Clause l(iii shall not extend to any portion or function of a product that is not itself compliant with part of the relevant AMBA Specification; and (iil)no right is granted to LICenSEE to sublicense thc rights granted to LICENSEE undcr this agrecment 3. Except as specifically licensed in accordance with Clause 1, LICENSEE acquires no right, title or interest in any ARM technology or any intellectual property embodied therein. In no event shall the licences granted in accordance with Clause I be onstrued as granting LICENSEE, expressly or by implication, estoppel or otherwise, a licence to use any aRM technology except the relevant. AMBA Specification 4. TIIE RELEVANT AMBA SPECIFICATION IS PROVIDED"AS IS" WITII NO REPRESENTATION OR WARRANTIES EXPRESS IMPLIED OR STATUTORY INCLUDING BUT NOT LIMITED TO ANY WARRANTY OF SATISFACTORY QUALITY, MERCHANTABILITY, NON-INFRINGEMENT OR FITNESS FOR A PARTICULAR PURPOSE, OR THAT ANY USE OR IMPLEMENTATION OF SUCH ARM TECHNOLOGY WILL NOT INFRINGE ANY THIRD PARTY PATENTS COPYRIGHTS. TRADE SECRETS OR OTHER INTELLECTUAL PROPERTY RIGHTS 5. NOTWITHSTANDING ANYTHING TO THE CONTRARY CONTAINED IN THIS AGREEMENT TO THE FULLEST EXTENT PETMITTED BY LAW. THE MAXIMUM LIABILITY OF ARMIN AGGREGATE FOR ALL CLAIMS MADE AGAINST ARM. IN CONTRACT TORT OR OTHERWISE. IN CONNECTION WITH THE SUBJECT MATTER OF THIS AGRFEMENT (INCLUDING WITHOUT LIMITATION (LICENSEE'S USE OF THF ARM TECHNOLOGY, AND(D)THE IMPLEMENTATION OF THE ARM TECHNOLOGY IN ANY PRODUCT CREATED BY LICENSEE UNDER THIS AGREEMENT) SHALL NOT EXCEED THE FEES PAID (IF ANY)BY LICENSEE TO ARM UNDER THIS AGREEMENT THE EXISTENCE OF MORE THAN ONE CLAIM OR SUIT WILL NOT ENLARGE OR EXTEND THE LIMIT LICENSEE RELEASES ARM FROM ALL OBLIGATIONS LIABILITY CLAIMS OR DEMANDS IN EXCESS OF THIS LIMITATION 6. No licence, express, implied or otherwise. is granted to LICENSEE, under the provisions of Clause l, to use the ARM tradename, or AMBA trademark in connection with the relevant AMBA Specification or any producIs based thereon. Nothing in Clause I shall be construed as authority for liCensee to make any representations on behalf of ARM in respect of the relevant AMBA Specification 7. This Licence shall remain in forcc until terminated by you or by arM. without prcjudicc to any of its othcr rights if LICENSeE is in breach of any of the terms and conditions of this Licence then ARM may terminate this Licence immediately upon giving written notice to You. You may terminate this liccncc at any timc. Upon expiry or termination of this licence by You or by ARM ARM IHI 0050B Copyright o 2014, 2017 ARM Limited or its affiliates. All rights reserved III D080717 Non-Confidential LICENSEE Shall stop using the relevant AMBA Specification and destroy all copies of the relevant AMBA Specification in your possession togcthcr with all documentation and rclated matcrials. Upon expiry or termination of this Liccncc, the provisions of clauses 6 and 7 shall survive 8. The validity, construcLion and performance of this Agreement shall be governed by English Law Confidentiality Status This document is Non-Confidential. The right to use, copy and disclose this document may be subject to license restrictions in accordance with the terms of the agreement entered into by ARM and the party that arm delivered this document to Product stat The informalion in this docunent is final, that is for a developed product Web address http://www.arm.com Copyright o 2014, 2017 ARM Limited or its affiliates. All rights reserved ARM IHI 0050B Non-Confidential D080717 Contents ARM AMBA 5 CHI Architecture Specification reface bout this specification Feedback Chapter 1 Introduction Architecture overview .1-18 Topology… erminology ction classificati Coherence overview .1-25 1.7 Read data source 1-29 Chapter 2 Transactions Channels overview 2-32 Channel fields 2-33 2.3 ransaction structure Ordering 2.5 Introduction to identifier fields 2-72 2.6 Transaction identifier fields 2-73 Transaction identifier field flows 2-75 28 Logical Processor Identifier 2-90 2.9 Address, Control and data 2-91 2.10 Data transfer 2-100 2.11 Request retry 2-111 Chapter 3 Network Layer System address map 3-116 3.2 Node ID .3-117 ARM IHI 0050B Copyright O 2014, 2017 ARM Limited or its affiliates. All rights reserved D080717 Non-Confidential Contents 3.3 Target id determination for messages from an RN 3-118 34 Network layer flow examples.…… 3-120 Chapter 4 Coherence Protocol Cache line states 4-124 4.2 Request types 4-126 4.3 4-14 4.4 Request types and corresponding snoop requests 4-144 4.5 Response types 4-146 4.6 Silent cache state transitions 4.7 Cache state transitions 4-157 4.8 Shared clean state retu 4-176 4.9 Hazard conditions 177 Chapter 5 Interconnect protocol flows 5 Read transaction flows 5-180 5.2 Dataless transaction flows ..5-189 5.3 Write transaction flows Atomic transaction flows 55 Stash transaction flows 5.6 Hazard handling examples... 5-205 Chapter 6 Exclusive Accesses 6. Overview 6214 6.2 6. 3 Exclusive transactions 6-218 Chapter 7 Cache Stashing 7 Overview 7-224 7.2 Write with stash hint 7-226 7.3 Independent stash request 7-227 7.4 Stash target identifie 7-229 7.5 Stash messages 7230 Chapter 8 DVM Operations 8. 1 DVM transaction flow ∴8-232 8.2 DVM Operation ty 8.3 DVM Operations 8-244 Chapter 9 Error Handling 9 Error type 9-252 9.2 Error response fields aa“a 9-253 9.3 Errors and transaction structure 9-254 9.4 Error response use by transaction type 255 9.5 Poison 9261 9.6 Data check 9.7 Interoperability and poison and data check 9-263 9.8 Hardware and software error categories…… 9-264 Chapter 10 Quality of Service 10.1 Overview 10-266 10.2 os priority value 10-26 0. 3 Repeating a transaction with higher Qos value 1面国aa11““日11 10-268 Chapter 11 Data Source and Trace Tag 11.1 Data sou 11-270 11.2 Trace tag 11-273 Copyright 2014, 2017 ARM Limited or its affiliates. All rights reserved ARM HI 0050B D080717 Chapter 12 Link Layer 12. Introduction 12-276 12.2 Links 12-277 12.3 Flits 12-278 12.4 Channels 2-27 12.5 Port 12-281 12.6 Node interface definitions 12282 12.7 Channel interface signals 12-285 2.8 Flit packet definitions 2-289 12.9 Protocol flit fields 12-293 12.10 Link flit 412-314 Chapter 13 Lin k handshake 13.1 Clock and initialization 13-316 13.2 Link layer Credit 13-317 13.3 Low power signaling 13-318 13.4 Flit level clock gating 13-319 13.5 Interface activation and deactivation 13-320 13.6 Transmit and receive link Interaction 13-326 13.7 Protocol layer activity indication Chapter 14 ystem Coherency Interface 14.1 Overview 14.2 Handshake Chapter 15 Properties, Parameters, and Broadcast Signals 15.1 Intertace properties and parameters 15-342 15.2 Optional interface broadcast signals 15-344 15.3 Atomic transaction support 5-346 Appendix A Message Field Mappings A 1 Request message field mappings A-351 2 Response message field mappings A-352 A.3 Data message field mappings …A-353 A 4 Snoop Request message field mappings A-354 ppendix B Communicating Nodes B.1 Request communicating nodes B-356 B 2 Snoop communicating nodes B-358 B 3 Response communicating nodes B-359 B 4 Data communicating nodes B360 Appendix C Revisions Glossary ARM IHI 0050B Copyright O 2014, 2017 ARM Limited or its affiliates. All rights reserved D080717 Non -Confidentia/ Contents Copyright 2014, 2017 ARM Limited or its affiliates. All rights reserved ARM HI 0050B Non-Confidentia D080717 Preface This preface introduces the AMBA 5 CH/ Architecture specification. It contains the following sections About this specification on page x Using this specification on page x Conventions on page xi Additional reading on page xiv Feedback on page Xv ARM IHI 0050B Copyright o 2014, 2017 ARM Limited or its affiliates. All rights reserved D080717 Non-Confidential About this specification About this specification This spccification describes thc AMBa 5 CHI architecture Intended audience This specification is written for hardware and software engineers who want to become familiar with the ChI architecture and design systems and modules that are compatible with the Chi architecture Using this specification This book is organized into the following chapters Chapter l Introduction Read this for an introduction to the Chi architecture, and the terminology used in this specification. Chapter 2 Transactions Read this for an overview of the communication channels between nodes, the associated packet fields and the transaction structure Chapter 3 Network Layer Read this for a description of the Network layer that is responsible for determining the node Id of a destination node Chapter 4 Coherence Protocol Read this for an introduction to the coherence protocol Chapter 5 Interconnect Protocol Flows Read this for examples of protocol flows for different transaction types Chapter 6 Exclusive Accesses Read this for a description of the mechanisms that the architecture includes to support Exclusive Chapter 7 Cache stashing Read this for a description of the cache stashing mechanism whereby data can be installed in a Chapter 8 DvM Operations Read this for a description of Dvm operations that the protocol uses to manage virtual memory Chapter g Error Handlin Read this for a description of the error response requirements Chapter 10 Quality of service Read this for a description of the mechanisms that the protocol includes to support quality u/ Service(Qos) Chapter ll Data Source and Trace Tag Read this for a description of the mechanisms that provide additional support for the debugging, tracing, and performance measurement of systems Chapter 12 Link Layer Read this for a description of the Link layer that provides a mechanism for packet based communication between protocol nodes and the interconnect Chapter 13 Link handshake Rcad this for a dcscription of the link laycr handshake rcquircmcnts Copyright o 2014, 2017 ARM Limited or its affiliates. All rights reserved ARM IHI 0050B Non-Confidential D080717

(系统自动生成,下载前可以参看下载内容)