松下半导体32位低功率单片机MN103LF09...27系列.pdf松下半导体32位低功率单片机MN

文件名称: 松下半导体32位低功率单片机MN103LF09...27系列.pdf

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详细说明：松下半导体32位低功率单片机MN103LF09...27系列pdf,松下半导体32位低功率单片机MN103LF09...27系列样本。Panasonic MN103L09/10/1112/13/14/15/16/17/18192021/2223/24252627 Series Features(continued) Bus interface Bus area 2MB×2 banks Data bus 8/16 bits DMA Controller Transfer area Internal ROM space/ Internal RAM space/ Internal IO area/ External memory space <> Internal ROM space /Internal RAM space /Intenal l/O area/ External memory space Channel Transfer form 2 bus cycles transfer Transfer requests MNIO3LF09 Series (External interrupts: 4, Timer: 30. Serial I/F: 33, IIC: 3, A/D converter: 1, CAN controller: 1, IEBus controller: 2, Software: 1) MN031F10/1/2/31415eics:74tpo (External interrupts: 4, Timer: 30. Serial I/F: 33, IIC: 3, A/D converter: 1, IEBus controller: 2, Software: 1) MN103LF22/23/24/ 25/26/27 series 73 types (External interrupts: 4, Timer: 30. Serial I/F: 33, IC: 3, A/D converter: 1, CaN controller: 1, Software: 1) MN1O3LF16/17718/19/20/21 series type External interrupts: 4, Timer. 30. Serial I/F: 33, IIC: 3, A/D converter: 1, Software: 1) Transfer modes 3 modes(One word transter/ Burst transfer/Intermittent transfer) Interrupt functions Internal interrupts MNIOLEO9 Series 96 factors (Timer: 46, Serial IF: 22, IIC: 6, Watchdog timer: 1, DMA: 12, A/D converter: 1, CAN controller: 1 IEBus controller: 4, Power Voltage Detection: 2, System error: 1) MN103LF10/11/ 12/13/14/15 series: 95 factors (Timer: 46, Serial I/F: 22, IIC: 6, Watchdog timer: I, DMA: 12, A/ converter: I IEBus controller: 4, Power Voltage Detection: 2, System error: 1) MN103LF22/23/24/25/26/27 scrics 92 factors (Timer: 46, Serial IF: 22, IIC: 6, Watchdog timer: 1, DMA: 12, A/D converter: 1, CAN controller: 1 Powcr Voltage Dctection: 2, Systcm crror: 1) MN103LF16/17/18/19/20/21 series: 91 fac (Timer: 46, Serial I/F: 22, IIC: 6, Watchdog timer: 1, DMA: 12, A/D converter: 1, Power Voltage Detection: 2, System error: 1) Extemal interrupts 11 factor (RQn pin(n=0 to 8): 9, MIRQ pin(sharing pin with IRQ7 as an interrupt factors): I, Kcy input: 1) Watchdog Timer Watchdog Timer On dctection of crror hardwarc resct is donc inside the lsi (Non-maskable interrupt is generated by the first watchdog time-out event, and hardware reset is done by a series of two time-out events) Time-out cvcl CPU clock cycle xN(N=26, 28, 220, 227) Watchdog Timcr2 On detection oferror. hardware reset is done inside the lsi (Non-maskablc interrupt is gcncrated by thc first watchdog timc-out event, and hardwarc resct is donc by a scrics of two timc-out Time-out cvcl Internal low-speed oscillation clock cycle xNN-24, 25, 26, 27, 28, 29, 210, 211, 212, 23, 214, 215 Ver, ae MN103L09/10/11/12/13/141516/1718192021/2223/2425/2627Sees Panasonic Features(continued) e Timer counter 26 units 8-bit timer 8 units 8-bit simple timer 5 units 8-bit free-running timer: 1 unit 16-bit timer 10 units Motor control 16-bit timer 1 unit 24H 8-bit timer 1 unit Timer0(8-bit timer) Timer count (Up count), external event count, timer pulse output, PWM output(Cycle is fixed ), compare register with double buffer Clock source: clksp, clksp/4, clksp/16, clksp/ 32, clksp/64, clksp/ 128. clkbus/2, clkbus/4, clkbus/8. clksx, external clock Timer 1(8-bit timer) Timer count (Up count), external event count, timer pulse output, 16-bit cascade connection(to timer O), compare register with double buffer Clock source: clksp, clksp/4, clksp/16, clksp /32, clksp/64, clksp/128, clkbus/2, clkbus/4, clkbus/8. clkSx, external clock Timer 2(8-bit timer) Timer count(Up count), external event count, timer pulse output, PWM output( Cycle is fixed), 24-bit cascade connection(to timer (), timer 1), compare register with double buffer Clock source: clksp, clksp/4, clksp/16, clksp/32, clksp/64, clksp/128, clkbus/2, clkbus/4, clkbus/8, clksx, external clock Timer 3( 8-bit timer) Timer count(Up count), external event count, timer pulse output, 16-bit cascade connection(to timer 2), 32-bit cascade connection(to timer 0. timer 1, timer 2 ), compare register with double buffer Clock source: clksp, clksp /4, clksp/16, clksp/32, clksp/64, clksp/128, clkbus/2, clkbus/4, clkbus/8, clkSx, external clock Timer 4(8-bit timer) Timer count(Up count), external event count, timer pulse output, PWM output( Cycle is fixed) Clock sourcc: clksp, clksp /4, clksp/16, clksp/32, clksp/64, clksp/ 128, clkbus/2, clkbus/4. clkbus/8, clkSx, cxtcrnal clock imer 20)(8-bit timer) Timer count(Up count), external event count, timer pulse output, PWM output(Cycle is fixed Clock sourcc: clksp, clksp/4, clksp /16, clksp/32, clksp/64, clkbus/2, clkbus/4, clkSx, cxtcrnal clock Timer 21(8-bit timer) Timer count (Up count), timer pulse output, timer output for VFD Clock sourcc: clkbus/2. clkbus/4. clkbus/16. clkbus/2. clkbus/64. clkbus/128 Timer 22(8-bit timer) Timer count(Up count), external event count, timer pulse output, PWM output( Cycle is fixed) Clock sourcc: clksp, clksp/4, clksp/ 16, clksp/32, clksp/64, clkbus/2, clkbus/4, clkSx, cxtcrnal clock Timer 6(8-bit frcc-running timer Clock source: clksp, clkbus, clksx, clksp/212, clksp/2 3, clksx/22, clksx/23 Timer 7(16-bit timer) Timer count (Up count), external event count, timer pulse output. PWM output (cycle/ duty continuous changeable), input capture(I system Clock sourcc: clksp, clksp 2, clksp/4, clksp/16, clkbus/2, clkbus/ 4, clkbus/16, cxtcrnal clock Panasonic MN103L09/10/1112/13/14/15/16/17/18192021/2223/24252627 Series Features(continued) T imer counter(continued) imer8,9,10、11,12,13,14,15,16(16- bit timer Timer count(Up count, Down count), external event count, timer pulse output PWM output(cycle/ duty continuous changeable), input capture(2 system), 2 phases encoder Clock source: clkbus, clkbus/8, timer O or I compare match cycle, external clock Timer M (Motor control 16-bit timer Timer pulse output, external event count, complementary 3 phases PWM output(triangular wave and saw-tooth wave output. dead time insertion), Output control by external interrupt (Hi-Z output or output data is fixed) Clock source: clksp, clkbus, external clock divided by 1, 2, 4 or 16 Timer A, B, C,D,(8-bit simple timer Serial transfer base clock generation 4, clksp/8, clksp/16, clksp/32, clkbus/2, clkbus/4 24[ Timer arm function Interval function Clock source: clksx, clksp(Only when CPU stop) Serial interface 14 channels UART, Clock Synchronous 11 channels IIC G channels Serial 0, 1, 2, 3, 4, 9, 1(qUART/ Clock Synchronous) UART Parity check, overrun error /frame error detection Transfer size can be selected from 7 to 8 bits Clock synchronous The communication type can be selected from 2-ware or 3-wire. First tansfer bit can bc sclccted from msB or lsB Arbitrary size of 2 to 8 bits are selectable Continuous transmission continuous reception continuous transmission/reception are available Synchronous edge selection of transfer clock. Maximum transfcr ratc: 3.3 Mbps Clock source: Baud Rate Timer Bn output(n=0 to 4, 9, 10). external clock Serial 5, 6, 7, 8 (UART/ Clock Synchronous) UART Parity check, overrun error /frame error detection Transfcr sizc can bc sclcctcd from 7 to 8 bits Clock Synchronous The communication typc can bc sclcctcd from 2-warc or 3-wirc. Data input from SBO pin is prohibited First tansfer bit can be selected from msB or lSB Arbitrary sizc of 7 to 8 bits arc sclcctablc ( When sclcction sizc is 7 bits, first transfcr bit sctting is LSB only. Continuous transmission, continuous reception, continuous transmission/reception are available Maximum transfer 3 Mbps Clock source: Output of timer A, B. C, D, E divided by 2, 16 External clock Ver, ae MN103L09/10/11/12/13/141516/1718192021/2223/2425/2627Sees Panasonic Features(continued) Serial interface(continued) Ico, 1, 2( Multi master IIC Multi master lic 100 kHz/400 kHz communication is supported 7-bit. 10-bit slave address is settable General call communication mode is supported Clock source: Baud Rate Timer BIn output (n=0 to 2), external clock .AD converter Resolution 10 bit Channel 16 channels Clock source clkbus/2. clkbus/4. clkbus/8. clkbus/16. clksx x 2 DIA converter Auto reset Auto reset function can be selected on ofl Power supply voltage detection circuit Detection voltage can be set 2.6 V to 4.0 v by software Clock monitoring function Frequency error detection of extemal/PLL,clock Hardware reset or non-maskable interrupt generation can be selected by program when a frequency error is detected d driver :8 sets CAN controller( Mn103LF09/22/23/24/25/26/27 series only) Channels I channel CAN 2.0B specification basis Communication method. NRZ(Non-Return to Zero Transmission line 2-wire serial communication Communication channel: Max I Mbps Data length 0 to 8 byte Mcssagc framc Standard framc and extended framc arc supported (Standard frame format ID: 11 bits, Extended frame format ID: 29 bits) 136-bit x 32(transmission/reception) EBus(MN03LF09/10/1112131415se Channels 2 channels Communication modc Sclect from model and modc2 Driver/receiver External Ver, ae Panasonic MN103L09/10/1112/13/14/15/16/17/18192021/2223/24252627 Series Features(continued) ● Port function MN103LF09/12/15/ 18/21/24/27 series IO port 130 pins CMOS LO 102 pins Combination CMOs LO and oscillation pin DInIS Combination CMOs IO and Analog io 16 pins Combination CMos lo and led driver Special function pin Reset input pin (NRST)(software reset is available A/D converter reference voltage input pin (VREFd) Capacity connect pin (VOUTI8 Function contol pins(NOCDMOD, ATRST) Power supply pin(VDD50) GND pins(VSS) Analog power supply pin(AVDD) 1 pins Analog gnd pins (Avss) MN1O3L F11/14/17/20/23/26 series 1O ports 115 pins CMOS 1O pins Combination CMOS IO and oscillation pin Combination CMOs IO and Analog /0 16 pins Combination CMos lo and led driver Special Reset input pin ( NRSt)(software reset is available 1 pin A/D converter reference voltage input pin (VREFID) bIn Capacity connect pin (VOUT18) Function contol pins(NOCDMOD ATRST P Powcr supply pin(VDD50) GND pins (Vss) Analog power supply pin(AVD) Analog gnd pins(AVss MN1O3LF10/13/16/19/22/5 series IO port CMOS 1O 59 pins Combination CMOS I/O and oscillation pin 4 pins Combination CMOS IO and Analog l/o 16 pins Combination cmos io and led driver pins Special functio Resct input pin(nrst)(softwarc resct is availablc) A/D converter reference voltage input pin (VREFH Capacity connect pin (VOUT18 Function contol pins(NOCDMOd, ATRST) Power pins 8 Power supply pin(VDD50 GND pins(VS Analog power supply pin(AVDD) Analog gNd pins(AVSS) I pins MN103L09/10/11/12/13/141516/1718192021/2223/2425/2627Sees Panasonic Features(continued) e Packa MN1O3LF09/12/15/18/21/24/27 series 144 pin LQFP(20 mm x 20 mm 0.5 mm pitch, halogen free) MN1O3LF11/14/17/20/23/26 series 128 pin LQFP(18 mm x 18 mm/0.5 mm pitch, halogen free MN103LF10/13/16/ 19/22/25 series 100 pin LQFP(14 mm x 14 mm 0.5 mm pitch, halogen free Power supply voltage VDD50 2.2Vto5.5V AVDD AVDD-VDDS0(A/D converter or D/A converter is not uscd) AVDD= VDD50227V(A/D converter or D/ A converter is used) Operating temperature 40to+105%C Ver, ae Panasonic MN103L09/10/1112/13/14/15/16/17/18192021/2223/24252627 Series ■ Pin Description LQFP144-P-2020D g dos-+2d 壬王 d=Nz99 g 望法正是是至装正至是是且 mt Oa aaa 2 !t!t!!tt:! 三呈图回吕当当因巨图图的图 PCOSDO1 B/TM7IOASDOGA/ANO POIS8 IBM703SBISAANSDAOUT PO2SBITR/ M7[C/SBI EAJANTn1 PC3/SBO2ASEO5A/SDADA AN11/DAOUT1B 105 SBT4ASCL2AIRQ7/NMA RQ FO4 SB12ASBI5AAN12 H≤ HI2ASBI5AAAN1 PBO/SBO4CM21GCPB ED7/TM17IOA/D14 1MH→→9 P8A儿LED!/M9oB P83/LED3/TM9IOAD 10 PB5/SBI8B MN103LF09 series P81/LEDI/TM8IOAD P10/TMOIOJAN14/(OCD_ SDA P11/TM1IOAN15/(OCD SCL) MNTO3LF12 series 94→PE6RX0B P12/TM2IO TM2210B MN103LF15 series GO/LCDO/TM3IO P了 MN103LF18 series NOCDMOD F44/OSCO+2 MN103LF21 series 145 MN103LF24 scries 29∞g8g6 PE5(ITXOB PE4(R×1B PT/TMNIOISYSCLK P76 P46/Xl P4/XI MN103LF27 series PI5TMNOD5/D7 P73TMNOD3/D5 OUTl 888∞9 Z/TMNODZ/D4 NRST PTITMNOD 1/03 ATRST P13IROSB/TM20IOB NWDOVF2+31 78→→PE(c p14/s0oNWE0←32 o(CTXOB) P15/SDIOA/NWE14.33 PG7/KCY7TM1GIOB/C1 P16 SBTCA/NRE+→34 POE/KEYD/TMIGIOA/CO PGOIRQ 74 P65/KEYS/TM15IOB/ 男导导导等等导88器原防8E岩西B距器图RFN 5d a5aom §目要区装要 xEx 2当豆8 o Ec LD CAN-cmbcddcc scr ca anly. MN103L09/10/11/12/13/141516/1718192021/2223/2425/2627Sees Panasonic Pin Description(continued) ●LQFP128P1818F g 日出 -m0g-S0oN-mN 男 PoI SEPBOSCE SB.=2 P4 PO2/3BT1BTM7OCISET6NAN10 P42:SBTAA/SC-2A/IRQ7/NMIRC PD3/SBC2ASBOSASDACOANITDAOU 1B 94→→P41:5604ASDA2ARQ6 POL/S312A/SBISAAN12 e3→ P40./TM1g015 s2-·P07 CD7/TMI1ICA/D14 PBO SBOAC/TM2c0→7 P81'SB14C TM21BH H7:5HI4C∥M/1H e9→P4LED4/TMOB:D11 P83 LED3/TM9IOA/D10 e7→Pe2LED2 TM3IOB/D9 P85/SB 8B MN103LF11 series c5··P匚cRx0D) P10 TMOIDAN14/OCD SDAI MN103LF14 series O LEDC/TM3I0 P12/TM2IO/TM22I0B MN103LF17 Series NOCDMOD co·P匚4Rx1D MN103LF20 series 9←3n1X1 78++P77:TMM O/SYSCLK P4505 MN103LF23 series P46/XI. MN103LF26 series 76+P74'TMMODA/DI DD50 P71.TMMOD1/D3 oUT18 P70 IMMAOUOD F13IRQ58TM20IOB/NWADOVF2 P14:SBo0A/NWE0← P6Z'KEYITI P"6/SBTOANRE 65+→P64KEY4/15|OAA 阴导导芋导导导畀导品58E吕图8器器品 ≤ 臣 ≤mOEuxma . AN-emhedrer series anly 1E3JS-embedded series cnly

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