PB_NUC140(CN)_EN_V3.02.pdfPB_NUC140(CN)_EN_V3.02TM

文件名称: PB_NUC140(CN)_EN_V3.02.pdf

所属分类: 其它

开发工具:

文件大小: 947kb

下载次数: 0

上传时间: 2019-09-14

提供者: weixin_********

下载 (947kb)

不能下载？报告错误

详细说明：PB_NUC140(CN)_EN_V3.02TM nuVoTon Figure 3-1 NuMicroTM NUC100 Series selection code Figure 3-2 NuMicroTM NUC 140 LQFP 100-pin Pin Diagram ..11 Figure 3-3 NuMicroM NUC140 LQFP 64-pin Pin Diagram 12 Figure 3-4 NuMicroM NUC140 LQFP 48-pin Pin diagram Figure 4-1 NuMicroTM NUC140 Block Diagram Figure 7-1 Typical Crystal Application Circuit 22 Figure 7-2 SPI Master dynamic characteristics timINg Figure 7-3 SPI Slave dynamic characteristics timing 30 Publication release date: Jan. 2.2012 Revision v3. 02 TM nuVoTon Table 1-1 Connectivity Supported Table Publication release date: Jan. 2.2012 4 Revision v3. 02 TM nuVoTon The Numicrotm nuc 100 series is 32-bit microcontrollers with embedded arm cortexTM-mo core for industrial control and applications which need rich communication interfaces. The CorteX TM-MO is the newest ARM embedded processor with 32-bit performance and at a cost equivalent to traditional 8-bit microcontroller numicrotm nuc 100 series includes nuc 100. Nuc 120. Nuc1 30 and NUc140 product line The NuMicroTM NUC 140 Connectivity Line with USB 2 lII-speed and CAN functions embeds Cortex T-Mo core running up to 50 MHz with 32K/64K/128K-byte embedded flash, 4K/8K/16K- byte embedded SRAM, and 4K-byte loader ROM for the ISP.It also equips with plenty of peripheral devices, such as Timers, Watchdog Timer, RTC, PDMA, UART, SPL, IC,I-S, PWM Timer, GPIO, LIN, CAN, PS/2, USB 2.0 FS Device, 12-bit ADC, Analog Comparator, Low Voltage Reset Controller and brown-out detector NUC100 NUC120 NUC130 NUC140 Table 1-1 Connectivity Supported Table Publication release date: Jan. 2.2012 Revision v3. 02 TM nuVoTon The equipped features are dependent on the product line and their sub products ARM Cortex TM-Mo core runs up to 50 MHz One 24-bit system timer Supports low power sleep mode Single-cycle 32-bit hardware multiplier NVIC for the 32 interrupt inputs, each with 4-levels of priority Serial Wire Debug supports with 2 watchpoints/4 breakpoints Build-in LDo for wide operating voltage ranges from 2.5V to 5.5 v ● Flash Memory 32K/64K/128K bytes Flash for program code 4KB flash for isP loader Support In-system program(ISP)application code update 512 byte page erase for flash Configurable data flash address and size for 128KB system, fixed 4KB data flash for the 32Kb and 64 KB system Support 2 wire ICP update through swd/ICE interface Support fast parallel programming mode by external programmer ● SRAM Memory 4K/8K/16K bytes embedded SRAM Support PDMA mode PDMA(Peripheral DMA) Support 9 channels PDMa for automatic data transfer between SRAM and peripherals ●C| ock Control Flexible selection for different applications Built-in 22 1 184 MHz high speed oSC for system operation ◆ Trimmed to t1%a+25℃ and Vdp=5V ◆ Trimmed to±3%at40℃~+85℃ and v=25V-5.5V Built-in 10 KHz low speed oSC for Watchdog Timer and Wake-up operation Support one PLL, up to 50 MHz, for high performance system operation External 4-24 MHz high speed crystal input for USB and precise timing operation External 32.768 kHz low speed crystal input for Rtc function and low power system operation ●GP|o Four l/o modes. Quasi bi-direction Push-Pull output Open-Drain output Input only with high impendence TTL/Schmitt trigger input selectable 10 pin can be configured as interrupt source with edge/level setting High driver and high sink lO mode support Publication release date: Jan. 2.2012 6 Revision v3. 02 TM nuVoTon e Timer Support 4 sets of 32-bit timers with 24-bit up-timer and one 8-bit pre-scale counter Independent clock source for each timer Provides one-shot, periodic, toggle and continuous counting operation modes Support event counting function Support input capture function ● Watchdog timer Multiple clock sources 8 selectable time out period from 1.6ms-26sec(depends on clock source) WDT can wake-up from power down or idle mode Interrupt or reset selectable on watchdog time-out ●RTC Support software compensation by setting frequency compensate register(FCR) Support RTC counter(second, minute, hour) and calendar counter(day, month, year) Support Alarm registers(second, minute, hour, day, month ye r) Selectable 12-hour or 24-hour mode Automatic leap year recognition Support periodic time tick interrupt with 8 period options 1/128, 1/64, 1/32, 1/16, 1/8 1/4. 1/2 and 1 second Support wake-up function PWM/Capture Built-in up to four 16-bit PWM generators provide eight PWm outputs or four complementary paired PWM outputs Each PWM generator equipped with one clock source selector, one clock divider, one 8-bit prescaler and one Dead-Zone generator for complementary paired PWM Up to eight 16-bit digital Capture timers (shared with PWM timers) provide eight rising/falling capture inputs Support Capture interrupt Q UART p to three UART controllers UART ports with flow control (TXD, RXD, CTS and RTs UARTO With 64-byte FIFo is for high speed UART 1/2(optional)with 16-byte FIFO for standard device Support IrDA (SIR)and Lin function Support RS-485 9-bit mode and direction control Programmable baud-rate generator up to 1/16 system clock Support PDMA mode ●SP Up to four sets of sPl controller Master up to 32 MHz, and slave up to 10 MHz(chip working 5v) Support SPI master/slave mode Full duplex synchronous serial data transfer Variable length of transfer data from 1 to 32 bits MSB or lsB first data transfer Rx and Tx on both rising or falling edge of serial clock independently 2 slave/device select lines when it is as the master. and 1 slave/device select line when it is as the slave Support byte suspend mode in 32-bit transmission Support PDMA mode Support three wire, no slave select signal, bi-direction interface Publication release date: Jan. 2.2012 Revision v3. 02 TM nuVoTon IC Up to two sets of Ic device Master/Slave mode Bidirectional data transfer between masters and slaves Multi-master bus(no central master) Arbitration between simultaneously transmitting masters without corruption of serial data on the bus Serial clock synchronization allows devices with different bit rates to communicate via one serial bus Serial clock synchronization can be used as a handshake mechanism to suspend and resume serial transfer Programmable clocks allow versatile rate control Support multiple address recognition(four slave address with mask option) Interface with external audio codec Operate as either master or slave mode Capable of handling 8, 16-24-and 32-bit word sizes Mono and stereo audio data supported I-S and MsB justified data format supported Two 8 word FIFo data buffers are provided, one for transmit and one for receive Generates interrupt requests when buffer levels cross a programmable boundary Support two dma requests one for transmit and one for receive ●CAN2.0 Supports Can protocol version 2.0 part a and B Bit rates up to 1M bit/s 32 Message objects Each Message Object has its won identifier mask Programmable FIFO mode(concatenation of Message Object) Maskable interrupt Disabled Automatic Re-transmission mode for Time Triggered CAN applications Support power down wake-up function PS/2 Device controller Host communication inhibit and request to send detection Reception frame error detection Programmable 1 to 16 bytes transmit buffer to reduce CPU intervention Double buffer for data reception S/W override bus ●USB2.0 Full-Speed Device One set of UsB 2.0 FS Device 12Mbps On-chip USB transceive Provide 1 interrupt source with 4 interrupt events Support Control, Bulk In/Out, Interrupt and Isochronous transfers auto suspend function when no bus signaling for 3 ms Provide 6 programmable endpoints Include 512 Bytes internal SRaM as USB buffer Provide remote wake-up capabill EBI(External bus interface )support(100-pin and 64-pin Package Only Accessible space: 64KB in 8-bit mode or 128KB in 16-bit mode Support 8-/16-bit data width Publication release date: Jan. 2.2012 8 Revision v3. 02 TM nuVoTon Support byte write in 16-bit data width mode . ADC 12-bit SAR ADC with 700K SPs Up to 8-ch single-end input or 4-ch differential input Single scan/single cycle scan/continuous scan Each channel with individual result register Scan on enabled channels Threshold voltage detection Conversion start by software programming or external input Support PDMA Mode Analog Comparator Up to two analog comparators External input or internal bandgap voltage selectable at negative node Interrupt when compare result change Power down wake-up One built-in temperature sensor with 1C resolution ● Brown- Out detector With 4 levels: 4.5V/3.8V/2.7 V/2.2V Support Brown-Out Interrupt and Reset option Low Voltage reset Threshold voltage levels: 2.0V Operating Temperature:-40℃-85℃ e Packages All Green package(RoHS) LQFP 100-pin /64-pin /48-pin Publication release date: Jan. 2.2012 Revision v3. 02 TM nuVoTon NUC140LC1CN 32 4 KB 4kB 4 KB up to 31 4x32-bit2 48x12-bit vLQFP48 NUC140LD2CN 64 KB 8KB 4 KB 4 KB up to 31 4x32-bit2 48x12b LQFP48 NUC140LE3CN 128 KB 16 KB Defnable 4 KB up to 31 4x32-bit2 48x12-bit I V LQFP48 NUC140RC1CN 32 KB 4 KB 4KB 4 KB up to 45 3 2 2 211248x12bt LQFP64 NUC140RD2CN 64 KB 8 KB 4KB 4 KB up to 45 4x32-bit3 48x12-bit V LQFP64 NUC140RE3CN 128 KB 16 KB Definable 4 Kb up to 45 4x32-bit3 2 4|8x12-bit V LQFP64 NUC140VE3CN 128 KB 16 KB Definable 4 KB up to 76 4x32-bit342 8|8x12-bit LQFP100 Figure 3-1 NuMicroTM NUC100 Series selection code Publication release date: Jan, 2.2012 10 Revision v3. 02

(系统自动生成,下载前可以参看下载内容)