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文件名称: 芯片调光mps44010.pdf
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  上传时间: 2019-09-14
  提 供 者: weixin_********
 详细说明:芯片调光mps44010pdf,调光芯片Operating Range N After turn on 10.7 Turn on threshold 124 13.4 Turn off threshold 8798107 Hysteresis 2.2 3 Zener Voltage IIN=20mA 22 25 28 Start-up Current startup 11V 40 A Quiescent Current No switch 046065 mA Operating Current Fs=70kHz, Cload=1nF 1.6 2.5 mA Input Bias Current MULT HA Linear Operation Range AULT o to 3 Output Max Slope △Vcs/△ VMULT 1.62 1.85 (5)(6) K 0640821∧ Feedback Voltage 2465252535 Feedback Voltage Line Regulation V|N=10.7Vto22 2 m∨ Feedback bias current FB 卩A Open Loop Voltage Gain 60 80 dB Gain-Bandwidth Product GB MHZ Source Current COMP source 4 mA Sink Current 2.5 5.5 mA Upper Clamp Voltage COMP H 53666V Lower Clamp Voltage 2.2224V Input Bias current HA Delay DT 300 450 ns Current Sense Clamp Voltage CS Clamp 1.6 1.72 1.83 Current sense offset MULT OV 30 cs Offset MULT=2.5V 5 mv Upper Clamp Voltage ZCSclamp H Izcs=2.5mA 7.2 7.8 8.3 P44010Rev.1.12 www.Monolithicpower.com 4/14/2014 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited o 2014 MPS. All Rights Reserved Lower Clamp Voltage ZCSclamp L|ZCS 2.5mA 0.3 0.55 0.8 Zero Current Sensing Threshold Vics HVzcs rising 2.1 2.3 Vics LVzcs falling 1.15 1.35 V Zcs En Threshold Vzcs ENR Vics rising 310 mv ZCS EN Hysteresis IViCS EN hys 120 mV Source Current Capability Zos scurce 3 mA Restart Current After disable res 60 85 UA Re-Start Time 80 1752 280 us Dynamic OVP Current OVP 30 40 50A Hysteresis OVP Hys 30 UA Static oVP Threshold V 2.2 2.4 20mA 2.4 2.7 Dropout Voltage IGDsource =200mA 3.9 5.1 200mA 0515V Voltage Fall Time T 30 70 ns Voltage Rise Time T 40 80 ns Max Output Drive Voltage max 12 13.5 14 Source Current Capability Gate source -600 mA Sink Current Capability sink 800 mA UVLO Saturation voltage vIn=o to VIN ON Saturation Gate sink=10mA 0.3 5) The multiplier output is given by: Vcs=K. VMUTL (VCOMP-25) 6)Guaranteed by design P44010Rev.1.12 www.Monolithicpower.com 4/14/2014 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited o 2014 MPS. All Rights Reserved Supply Current vs Supply Current vs. TJ Start-up& UVLO VS TJ Supply voltage 1 00 LOAD-InF, Fs=70KHZ, TJ=25C 10 14 perating Current 10 Rising Quiescent Current 口 0.1 Falling 0.1 10 0.01 Start-up Current 9 0.001 0.01 0 510152025 50 0 50 100150 -50 50100150 TEMPERATURE(°C) TEMPERATURE(°C) VIN Zener Voltage vs. T Feedback Reference vs TJ Delay-to-output vS TJ 30 2.6 500 2.55 400 ugHO>uzuN 占26 g300 2.45 200 22 20 2.4 100 50100150 050100150 50100150 TEMPERATURE (C) TEMPERATURE (C) TEMPERATURE(C) OVP Current vS. TJ Multiplier Characteristic Multiplier Gain vS. TJ 50 1.8 1.6 COMP=4V 0.8 1.2 COMP=5V 0.6 与 40 80.8 -COMP=3.5V 0.4 0.6 COMP=3V 35 0.4 COMP=2.6V 0.2 0.2 30 0 0 -50 0 50100150 0 50100150 TEMPERATURE(°C) MULT (V) TEMPERATURE(°C P44010Rev.1.12 www.Monolithicpower.com 4/14/2014 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited o 2014 MPS. All Rights Reserved continued ZCS Clamp Levels vs. TJ Gate-drive Output Gate-drive Output High Saturation Low Saturation 10 700 1000 Upper clamp 600 800 500 400 600 n=0ON 8 300 400 200 Lower Clamp 200 100 0 0 -50 50100150 23 6 TEMPERATUREC VGD DROPOUT (V) A VGD(V) P44010Rev.1.12 www.Monolithicpower.com 4/14/2014 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited o 2014 MPS. All Rights Reserved continued PoUT=100W OUT=50 POUT=OW OUT AC Coupled AC Coupled 10V/div 10V/div -+-4- ∨REC REC REC 200VdV.② oOV/divE 200/dⅳ 1A/div 1A/dv 1A/div 4ms/div 400ms/div 1A/div VOUT A 200V/div 200Vidiv OV/div 100vdⅳ 100V/div.a AtE 10A/d MunmiMwMp Nww牌wH 2A/di 20v/dⅳv 200ms/diy 200ms/div 4us/div Vac=85V 35 1A/div 25 IEC1000-3-2 Class c 卜--++4 15 GATE 5 MP44010 Design EXample lOOps/div HARMONIC ORDER P44010Rev.1.12 www.Monolithicpower.com 4/14/2014 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited o 2014 MPS. All Rights Reserved FB Feedback pin. The output voltage is fed into this pin through a resistor divider COMP Output of the error amplifier. A compensation network is connected between this pin and FB pIr muLt nput of the multiplier Connect this pin to the rectified main voltage via a resistor divider to provide the sinusoidal reference for the current control loop Current sense pin. The current through MOSFET is fed into this pin via a resistor. The resulting voltage on this pin is compared with the output of internal multiplier to get an internal sinusoidal-shaped reference, to determine MOSFETs turn-off On-chip r/C filter can reduce high frequency noise on this pin ZCS Inductors zero-crossing current sensing input. A negative-transition edge triggers MOSFETs turn -on 6 GND Ground Gate driver output. The high output current of the gate driver is able to drive low-cost power GATE MOSFET. The high-level voltage of this pin is clamped to 12V in case this pin is supplied with a high vcc VIN Supply voltage of both the signal path of the Ic and the gate driver. a bypass capacitor from this pin to ground is needed to reduce noise P44010Rev.1.12 www.Monolithicpower.com 4/14/2014 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited o 2014 MPS. All Rights Reserved The MP44010 is a boundary conduction mode When the load is very light, the output voltage PFC controller which is optimized for the pfc tends to stay steadily above the nominal value. In pre-regulator up to 300W and fully complies with this condition, the error amplifier output will the IEC1000-3-2 specification saturate low. When the error amplifier output is lower than 2.2V, static OVP will be triggered Consequently, the gate driver will be blocked to The output voltage is sensed at the fb pin turn off the external power mosfet and the through a resistor divider from output voltage to device enters an idle state. Normal operation is ground. The accurate on-chip reference voltage resumed once the error amplifier output goes and the high performance error amplifier regulate back into the regulated region the output voltage accurately. The MP44010 offers two stages of over-voltage protection: dynamic over-voltage protection and static over-voltage protection With two-stage protection, the circuit can operate reliably The MP44010 achieves oVP by monitoring the current flow through the ComP pin 25V R10 R10 At steady-state operation, the current flow through high-side feedback resistor R9 and low side feedback resistor r10 is R9 R9 R10 R10 If there is an abrupt rise on the output (AVo), and the compensation network connected between The MP44010 can be disabled by pulling the FB pin and ComP pin takes time to achieve high zero current sensing (ZCs) pin lower than power factor (PF)due to the long Rc time 190mV. This can help to further reduce quiescent constant. The voltage on FB pin will still be kept current when the PFC pre-regulator needs to be at the reference value. The current through R10 shutdown After releasing the ZS pin it will stay remains equal to VFB/R10, but the current through at lower clamp voltage when there is no external R9 will become voltage from auxiliary winding V。+△Vo-VFe R9 R9 This current has to flow into the CoMP pin. At the same time this current is monitored inside the chip. If it rises to 35ua, the output voltage of the multiplier will be forced to decrease and the energy delivering to output will be reduced. If this current continues to rise to about 40ua, the dynamic ovp could be triggered. Consequentl the gate driver is blocked to turn off the external power MosFet and the device enters an idle state. This state is maintained until the current falls below 1oua the point at which the internal starter will be re-enabled and allows the switching to restart P44010Rev.1.12 www.Monolithicpower.com 4/14/2014 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited o 2014 MPS. All Rights Reserved When the current of the boost inductor reaches from the output of the multiplier. When the zero, the voltage on the inductor will be reversed. external power MOSFET turns on, the inductor Then Zcs generates the turn-on signal of the current rises linearly. When the peak current hits MOSFet by sensing the falling edge of the the sinusoidal-shaped signal, the external power voltage on the auxiliary winding coupled with the mosfet begins to turn off and the diode turns inductor. If the voltage of the Zcs pin rises above on. The inductor current also begins to fall. When 2. 1V, the comparator waits until the voltage falls the inductor current reaches zero, the power below 1.35V. Once the voltage falls below 1.35v, MOSFET begins to turn on again, which causes the MP44010 turns on the MosFET. The 7.8v the inductor current to start rising again The high clamp and 0.55v low clamp protect the zcs power circuit works in boundary conduction mode, pin. The internal 175us timer generates a signal and the envelope of the inductor current is to turn on the MosFet if the driver signal has sinusoidal- shaped. the average input current is been low for more than 175us. This also allows half of the peak current, so the average input the MOSFet to turn on during start-up period current is also sinusoidal-shaped. a high power since no signal is generated from zcd then factor can be achieved through this control method The MP44010 offers 30mv voltage offset for Mult plier output multiplier output near the zero-crossing of the line voltage which can force the circuit to process Inductor current more energy at the bottom of the line voltage With this function the thd of the current could be evidently reduced Input average current To prevent redundant energy, this offset is reduced as the instantaneous line voltage increases. Therefore the offset will be negligible near the top of the line voltage The mP44010 senses the inductor current The control flow chart of the mp44010 is shown through the current sense pin and compares to in Figure 5 the sinusoidal-shaped signal which is generated Turn On OMP Clamp to Y Monitor v Latch of Ic VOu<2.2V 25/
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