1 _ M601_user.pdf半导体测试技术，测试相关文献技术资料，可以指导使用The hand

文件名称: 1 _ M601_user.pdf

所属分类: VB

开发工具:

文件大小: 11mb

下载次数: 0

上传时间: 2019-09-07

提供者: weixin_********

下载 (11mb)

不能下载？报告错误

详细说明：半导体测试技术，测试相关文献技术资料，可以指导使用The handler or prober can also generate a Retest signal, indicating that the part is untestable and should simply be rejected. This signal is currently ignored by Win92, although it can be detected using Send command programming in the job plan Finally, the handler or prober can, signal an ALARM condition, which means that the dut should receive special binning or that the test system should stop testing until some condition can be corrected. This condition can be recognized through the job plan as hialm by win92 alarm programming You can, as previously mentioned, program the interface to adapt to a wide variety of handlers and probers. both the inputs and the outputs can be changed. There are three possible characteristics to vary through programming Phase high-true or low-true level the voltage for a high Timing( when a signal goes high or low Not all of the interface's signals have programmable phase, level. And timing, however. The following discussion of the signals describes how each of them may be varied Input Signal Characteristics Inputs are: HANDLER START, HANDLER RETEST input, AUTO Ss RETEST input, HANDLER ALARM Input Phase. The interface can be programmed to recognize either high-true or low -true input signals from the handler. However, input signal phase is programmed for all input signals collectively (all must be either high-true or all must be low true ) The INPUT PHASE parameter defaults to low-true MI MAN and TECH NOTE When input signals are programmed low true, all unused inputs should be connected to a high level, or allowed to float In the high true mode unused inputs must be tied to ground Input Level. The input signal can be any positive level or pulse between 3v. The signal can be low true or high true Input impedance is a 47 kohm resistor in series with a olmp capacitor to ground. The junction of the r and c is clamped with diodes to be between -06v and 5.6V. Further information on the input lines is available in section 6.1 Unwanted pulses and noise on the input lines are filtered by the 47kohm resistor and the 0.lmf capacitor Input Timing. The signal duration can be from >600 mp to de Accuracy is +/-20%0 Output signal Characteristics Output signals are, BIN.EOS, and RETEst bin Phase. The polarity of the bin output signals can be programmed independently( from EOS phase)to be either high-true or low-true The bin outputs default to low-ti +EOS Phase. The polarity of the Eos output signal can be programmed independently( from bin phase to be either high -true or low-true assertive. The eos output defaults to low-true RETEST Phase. The retest output to the handler is unique as an output in that it is designed to simply echo a retest input. As a result the phase of this output signal is programmed to either high-true or low true by the input phase selection (that is, it has the same phase as the input signals .Signal Levels( All output Signals ) The BIN, EOS, and IIANDLER MI MAN and TECH 4 RETEST output signals can be programmed to either a + 5Vor a + 12V nominal pull -up level NOTE Currents into the tester are considered positive The bin and eos output signals share the following approximate characteristics Low Output Level: VOⅠ:1.0Vat50mA 0.3 at &mA High Output levels VOH:( open circuit)5V or 11v VOH:( at 500 Ma IOH)4.4V or 10V Short circuit current at 5v level programmed =-4mA nominal At 12V level programmed=-95mA nominal NOTE The RETEST output signal can be programmed to either a +.v or 12V pull-up level along with the bin and Eos outputs. It can sink, however, about 2OMA of current in either pulled-up mode Output Timing. The timing of the eos and bin signals can be independently programmed. The 12bin signals share the same timings. The interface permits the start and stop to occur at any time within a one-second period, with programming resolution of one millisecond This one-second period begins when the Win g2 has finished executing the follow, or overlap the eos signal The timing control of the retest signal is unique among outputs, as is its Phase control the timing of the retest output is not controlled by Interface hardware. But by the time at which its control bit is turned on And off by the win 92 MI MAN and TECH 以学社辛叫哒.与互 The accuracy of all timing is +20%0. Safety considerations The SaFeTY wire is connected to the safety wire output on the J1( pin L6) And J12( pin 20) bulkhead connector, as well as pin 20 of the handler interface connector on the test head. One of these wires must be pulled to ground before the tester delivers any voltages to the test station note that Each of the four test stations has its own separate safety wire It is intended that the safety wire be connected such that it is low only when shields are in place to prevent contact between the operator and any wires containing hazardous voltage WARNING MAKE SURE THAT APPLICATIONS HARDWARE YOU DESIGN CAUSES SAFETY TO GO HIGH IMMEDIATELT WHEN ANY SAFETY SHIELDS ARE OPENED The switch used to connect the safety wire to ground must be capable of switching 12v at 15MA 12. REFERENCE Bit charts The follo wing bit charts illustrates the bit functions related to the operation of the programmable handler/prober interface. These are partial bit charts NOTE The following bit charts are included for the sake of completeness. You are advised not to programming to the addresses illustrated below, as you may interfere with the win92 control. This is because attempts to use send command control in the job plan do not prevent the executive program from performing subsequent control at the end of the job plan. The handler MI MAN and TECH 6 or prober will undoubtedly become"confused"by this effect PA172 HANDLER 3& HANDLER 4 CONTROL PA172 SEC FUNCTION W/R ADD.g34B32831B24822821814812811804B02B01 SLEECT SELECT HANBLER HAHDLER HANDLE SELECT HANDLER OUTPUTOUTPUTINPUT F真 RAMETER5 WH PHASE PHASE PHASE COUNTEFL 啊w3 A3 AI ADpRESS LOAD HAM 更恶日N W我 FNABLE ENABLE TIME ELECT HANOLErHANDLE 点NDL HAADLER CLFAF CLFAR CLEAR CLEAR M真 NDLER H品Np E0S日N N TPIAEGT DIRECT DIRECT HANDLEH 4 HANPLEE 旺自5是日N TIN DIREGT DIRECT GO PA173 HANDLER 1 2 CONTAOL PA173 SEC FUNCTION| W/RADD934832831824B22B21B14B12B11B04B02801 SELECT SELECT HANOLEA w ANDLERJHANDLE SELECT HANDLER EOS OUTPUT OUTPUTINPUT PARAMETERS PHASE LEVEL PHASE PHASE L0▲0 COUNTERS Ad 粪DD爬E55 LOAD RAM EOS N E NABLE ENABLE TIME TIMETIME HANDLER NOLERHANCLER MANDLER CLEAR CLEAR CLEAR CLEAR HANDLER 1 BIN HANDLER DIRECT RECTDIRECT HANDLER 2 HANDLER Eos & BIN BIN DIRECT DIRECT DIRECT MAN and Tech 7 PA176 PENDANTS 384, AND STATION CONTROL PA176 SEC FUNCTION W/R ADD.B34B32831824822821814812811804B02B01 START HAND HAND HAND HAND AAUTOSSAUTO SS] REJECT REJECT AND RETEST STAHT STAHT RETEST RETEST CLEARCLEAR CLEAR CLEAR CLEAR sTaRT CLEAR CLEAR RESTART HAND HAND START START L▲TCH R BIN NUMBER W/R W6 BIN BIN 10BIN9 BIN B BIN 7 BIN BIN 5 BIN4 BIN3 BIN2 BIN1 BIN O BIN NUMBER W/ BIN 11 BIN 10 N9 BIN 8 BIN7 BIN B BIN 5 EIN 4 IBN 3 BIN 2 BIN 1 BIN o MI MAN and TECH FA177 PENDANTS 1 &2 AND STATION CONTROL PA1了7 I SEC. FUNCTIONW/R ADD.B4632831824B22821B|4B12B11804Bn2801 ▲H PENDANT PFN ANrFhnAN TPENDA N THANDH FAHANMIL FRHANC LER HAA DLER AUTO 3S AUTOSS REFCT REJECT ▲№ O RETEST sTAAT sTAat ETEST HEILET FIA TAnT hcTEsT ncTEoT CLCAA CLEAR CLCAn CLEAF eCA日sTAT CLEAN CLEAR CLEAR FLEAR CLLAR CLEAR STATION STATIO FsT幽F↑ 2PENDANT PEN2A1TPEMDAM TENDANIHANCLE I LATCH POWERPOWER 5TRrs血T AP Of START TAAr OFF CFF f阳D市吧hD户N T STA TIOAA1晶2 REA6典燕白|v典 OATA BITs Wm|aac"|AcκoAC SET MDOL RISEI PENDMNT G ENDI STATICN PENDANT FENDANT CMER CONTROL WITCH POWER IREADY TROUBLE CLEAR HEAD EAFETY ST1 PENDANT FENDANT POWER :AJOK SWITCH READY TROUBLE ON SET PENDANT FEND 2 PENDANTPEMDANT HANDLEn 2 SWITCH HER CONTROL READY TROUBLE CLCAR AEAD PEND 2 PENDANT FENDAMT ST 2 AFET下 WER SWITCH SET READY TROUBLE HANCLER 3 BIN NUMBER WR W5 BIN11 BIN 10 BIN9EIN8 BN7 BINE BIN5 AIN4BIN3BIN2BIN1 BIN Q HANDLE且磊日| NUMBER WIR EⅣ118108wgEⅣ88:E16E84日N3BN?N18M0 Pinouts Figure 1-1 illustrates the pinout of the handler/prober interface, J12,at both the bulkhead connector and the test head. The signal safety*is the same as on j1. The +5Vpin supports 100Ma total: the +/_12V pin supports 5oMa total. Totals are for all stations CAUTION Shorting to ground may result in test system damage MAN and Tech [01] bIN O [14 [02] HANDLER START B工N1 HANDLER RETEST 03 BIN 2 [16] 4] SUMMARY SHEET bIN 3 17 [05] REJECT BIN卣 HANDLER RETEST 06] OUT BIN 5 19 [07] HANDLER ALARM BIN 6 20] 08] SAFETY* BIN 7 21] [09] HANDLER CLEAR 工N8 [22] [10] 45W BIN 23 [11] +12V N10 [24 12] GROUND B工配11 25] 13 GROUND EOS Figure 1-1 Handler interface connector pinuuis (12 and on test head) MAN and tech 10

(系统自动生成,下载前可以参看下载内容)