MAX31865_cn.pdf该文档是max31865官网上的规格书，便于参考使用此芯片。MAX31

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详细说明：该文档是max31865官网上的规格书，便于参考使用此芯片。MAX31865 RTD至数字输出转换器 Electrical Characteristics (continued) (30V≤VD≤3.6V,TA=40°cto+125°c, unless otherwise noted. Typical values are TA=+25°C,Vp=Vp∨DD=3.3V.)( Notes2 and 3) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS ADC Common -Mode Input 0 Range RTD|N+,RTDN-,0°Cto+70°C, on -state Input Leakage Current RTDN-, RTDIN-,40°Cto+85°C,On- state RTD|N+,RTDN-,-40°Cto100°C,on- stete 14 Bias voltage VBIAS 1.95 2.002.06 Bias voltage Output Current OUT 0.2 575m Bias Voltage Load Regulation oUT≤575mA 30 V/mA Bias Voltage Startup Time Jote 4 10 ms ADC Full-Scale error LSB ADC Integral Nonlinearity Differential Input, endpoint fit, 0.3 X VBIAS ±1 LSB ≤VREF≤VBAs ADC Offset Error +3 LSB Noise(over Nyquist Bandwidth) Input referred 150 V RMS Commcn -Mode Rejection dB 50/60H7 Noise Rejection Fundamental and harmonics 82 dB Continuous conversion(60Hz notch) 16.717.6 Temperature Conversion Time Single conversion(60Hz notch) (Note 5) tcoNV ms Single conversion(50Hz notch) 62.5 66 ontinuous conversion (50Hz notch) 20 21 Automatic Fault Detection Cycle Time From Cs high to cycle complete 600 Power-Supply Rejection LSBA Power-Supply Current(Note 6) Shutdown /Blas off, ADC off 1.5 mA IDD Bias on, active conversion 2 3.5 mA Power-On Reset Voltage 2.27 Threshold Power-On Reset Voltage 120 mv Hysteresis Input Capacitance N Logic inputs pF Input leakage current Logic inputs +1 Output High Voltage UT=-1.6mA VDV OH 0.4 Output Low Voltage lOUT =1.6mA 0.4 www.maximintegrated.com/cn 3 MAX31865 RTD至数字输出转换器 AC Electrical Characteristics: SPl Interface (3.OV VDD <3.6V, TA=-40C to +125C, unless otherwise noted. Typical values are TA=+25 C, VDD Vdvdd=3.3V )(Notes 3 and 7)(Figure 1 and Figure 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Data to SCLK Setup tDC (Notes 8, 9) sclK to Data hold (Notes 8, 9) SCLK to Data∨alid CDD Notes 8,9,10) SCLK LOW Time tcL (Note 9) 100 SCLK High Time tcH(Note 9) 100 SCLK Frequency CLK Note g DC 50 MHZ SCLK Rise and Fall tF(Note 9) 200 Cs to SCLK Setup tcc ( Note 9) 400 ns SCLK to CS Hold Note 9 100 CS Inactive Time WH (Note 9) 400 CS to Output high -Z (Notes 8, 9) 40 Address 01h cr 02h Decoded to DRDY High tDRDYH After RTD register read access(Note 9) 50 Note 2: All voltages are referenced to ground when common. Currents entering the Ic are specified positive Note 3: Limits are 100% production tested at TA=+25C and/or TA=+85C Limits over the operating temperature range and rel evant supply voltage range are guaranteed by design and characterization. Typical values are not guaranteed Note 4: For 15-bit settling, a wait of at least 10.5 time constants of the input RC network is required. Max startup time is calculated with a 10ks2 reference resistor and a 0. 1uF capacitor across the RTD inputs Note 5: The first conversion after enabling continuous conversion mode takes a time equal to the single conversion time for the respective notch trequency Note 6: Specified with no load on the bias pin as the sum of analog and digital currents. No active communication. If the RtD input voltage is greater than the input reference voltage, then an additional 400HA lDp can be expected Note 7: All timing specifications are guaranteed by design Note 8: Measured at VIH-0 7V X VDyDD or VIL -0 3X VDVdd and 10ms maximum rise and fall times Note 9: Measured with 50pF load Note 10: Measured at VoH =0.7X VDyDD or VoL =0.3X VDVDD Measured from the 50% point of sclK to the VoH minimum of SDO www.maximintegrated.com/cn MAX31865 RTD至数字输出转换器 DE WRITE ADDRESS BYTE READ DATA BYTE NOTE: SCLK CAN BE EITHER POLARITY TIMING SHOWN FOR CPOL=1 图1.时序图:SP读数据传输 tcc R SCLK tco WRITE ADDFESS BYTE WRITE DATA BYTE lOTE: SCLK CAN BE EITHER POLARITY TIMING SHOWN FOR CPOL=1 图2.时序图:SP写数据传输 www.maximintegrated.com/cn MAX31856 高精度、带线性补偿的热电偶数字转换器典型工作特性 (VDD= VDVDD=3.3V, TA=+25C, unless otherwise noted. SUPPLY CURRENT VS, TEMPERATURE SUPPLY CURRENT VS TEMPERATURE (ADC AUTO CONVERSION MODE (ADC NORMALLY OFF MODE) ANALOG lou (BIAS PIN UNLOADED) ANALOG IDD i BIAS PIN UNLOADED) IGITAL IDI DIGITAL IDI 0 EMPERATURE LEAKAGE CURRENT PER PIN VS, TEMPERATURE SINC FILTER OPERATION (1 VOLT APPLIED TO FORCE+, FORCE2, RTDIN+, RTDIN-PINS) INPUT FREQUENCY VS NOISE RESPONSE 140 60HZ 三80 -4C 40 150 170 TEMPERATURE(C PUT NOISE FREQUENCY ADC CONVERSION ERROR VS RTD RESISTANCE ADC CONVERSION ERROR VS RTD RESISTANCE (4k2 RREF, 4-WIRE CONNECTION) 0488 0.4 (4002 BREF, 4-WIRE CONNEC os 0.244 40°C 0244 25°0 40°C ±01°0 C ±0.10 ERROR ERROR +100°0 +100°C 0244 0244 0488 0438 0500100015002000250030003500 050100150200250300350 RRT(S2) RRTD(S2) www.maximintegrated.com/cn 6 MAX31865 RTD至数字输出转换器引脚配置员8豆 GND1 16 10 GND2 NC.17 9 FORCE M4X31865 DVDD 19 7RTDIN+ 1}:2}:3;:41:5 去 TQFN (5mm x 5mm) TOP VIEW DRDY 20」NC. DVDD 2 19 GND BIAS MA×31865 17SD0 REFIN+ 5 REFIN-6 ISENSOR 14|SD FORCE2 9 RTDIN+ 10 11RTDIN- SSOP www.maximintegrated.com/cn MAX31865 RTD至数字输出转换器引脚说明引脚名称功能 TQFN SSOP 4 BAS偏置电压输出BAso 5REFN+基准电压输入正端,连接至BAS。在REFN+和REN之间连接参考电阻。 6REF|N-基准电压输入负端,在REFN+和REN之间连接参考电距。 4 ISENSOR RREF的低边,连接至REFN 58 FORCE+高边RTD驱动,使用3线连接配置时,将其连接到 FORCE2。具有±45过压俱护。 FORCE2|输入叶端,仅限3线配置。3线连接配置下将其连接OHCF+:2线或4线连接配置下,该引朋接地。具有 ±45V过压保护。 10RIDN+RTD输入正端,具有+45V过压保护。 8 RTDN-RTD输入负端,具有±45V过压保护。 9 12 FORCE·低边RTD回路,具有±45V过压保护。 13 GND2模拟地,连接至GND1 SD 串行数据输入。 12 15 SCLK串行数据时钟输入。 13 16 低电平有效片选,CS置为低电平时使能丰口。 14 17 SDO串行数据输出 15 18 DGND数字地。 19 GND1模拟地,连接至GND2 17 NC.不连接。 DRDY 低电平有效数据就绪推挽输出。数据寄存器出现新的转换结果时,DRDY置为低电平。对RTD电阻数据寄存器执行读操作时,DRDY恢复为高电平。 19 2DVDD数字电源输入,连接至3.3∨电源,利用01μF电容旁路至DGND。 20 vD模拟电源输入,连接至33∨电源,利用01μF电容旁路至GND1。裸焊盘(封装背面),连接至GND1。仅适用于TQFN封装。 www.maximintegrated.com/cn 8 MAX31865 RTD至数字输出转换器方框图 V DVDD VCD BIAS GENERATOR REFIN+ REFIN SCLK SERIAL ISENSOR TATA RFGISTERS Kh SDI LOGIC FORCE FORCE2 DIGITAL LOGIC N、3-WRE ONLY DIGITAL RIDIN+ 50/60HZ DIGITAL COMPARATOR 15-BT SINC FILTER ∑AADC FAULT DETECTION ±45PR0TEcT0N MASTER-INIT ATED FAULT-DETECTION ADC STATE DEDY MACHINE RIDIN CYCLE FORCE MAX316 GND2 GND DGND www.maximintegrated.com/cn MAX31865 RTD至数字输出转换器详细说明 MAx31865是成熟的RTD数字转换器,内置15位模数转换 PT100 RTD RESISTANCE 器(ADC)、输入保护、数字控制器、SP兼容接匚以及相关 VS, TEMPERATURE 的控制逻辑电路。信号调理电路优化用于PT100-PT1000 RTD,也支持其它热敏电阻。 50 温度转换 STRAIGHT-LINI 3300 APPROXIMATION 电阻温度检测器iRTD是一种阻值随温度变化的电阻。铂是最棠见、精度最高的测温金属丝材料。铂RTD称为出至∽出 ∽200 PT-RTD,镍、铜和其它金属亦可用来制造RTD。RTD具有 RTD RESISTANCE 较宽的测温范围,最高达+800°C,具有较高精度和较好的 100 可重复性,线性度适中。 50 对于 PT-RID,最常见的电阻是:O°C下标称值为1002和 1kQ,当然也有其它阻值。0°C和+100°C之间的平均斜率称 200-1000100200300400500600700 为阿尔法(a),斜率与铂的杂质及密度有关。最常见的两个a TEMPERATURE (C) 值是:0.00385和0.00392,分别对应于EC751(PT100)和 SAMA标准。图3.Pt100RTD电阻与温度的关系m线阻值与温度的关系曲线接近线性,但有一定弯由,可由 Callendar-∨ an dusen方程表示参考电阻的电流同栏流过RTD。参考电阻两端的电压为 R(T)=R0(1+aT+bT2+c(T-100T3) ADC基准电压。RTD电压连接至ADC差分输入(RTD|N+ 式中和RTDN-)。所以ADC产生的数字输出等于RTD电阻与参考电阻的比值。对于铂电阻RTD,选择阻值等于RTD0°C T=温度(°C 阻值的4倍的参考电阻最为合适。因此,针对PT100选用 R行T)=T温下的阻值 400参考电阻;针对PT1000则选用4k参考电阼 Ro=T为0°C时的阻值如果RTD位于MAX31865附近,采用2线连接(典型应用电路)即可获得较好的测试结果。注意,对于PT100,0.49 EC751规定=0.00385055及下列 Callendar-Van Dusen串联电阻引起的误差大约为1°C;因此,电缆长度增加时系数电缆电阻会引起过大的误差。 a=390830×103 4线连接通过使用独立的加载、检测(感应)引脚,消除了电 b=-5.77500×10-7 缆申阻引起的误差。当-200°C≤T≤0°C时,c=-4.18301×10-12;当0°C≤ 3线连接是一种折中方案,比4线方案少一条引线。为补偿 T≤+850°C时,c=0。导线上的压降,从(RTD|N+-RTD|N)中减去 FORCE+和图3所示为PT100RTD的电阻随温度的变化曲线:根据O° RTDIN+之间的电压,利用 FORCE2对输入采样实现。如果至+100°C之间的斜率进行直线逼近。电缆电阻具有很好的一致性,即可消除电缆电阻引入的误为测量RTD阻值,接入参考电阻RRE),该电阻与RTD串差。将配置寄存器的3线位置1,选择3线工作模式。联,偏置电压作用在RREF上端,如典型应用电路所示。 www.maximintegrated.com/cn

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