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文件名称: DDR4-SODIMM-outline.pdf
  所属分类: 嵌入式
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  文件大小: 340kb
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  上传时间: 2019-07-05
  提 供 者: qq_34******
 详细说明:DDR4攻口的绘图信息,文本信息介绍了DDR4的各个参数和相关信息。4.00 ULL R 74.20MN 7¥4.00MN 4.00±0.10 2X 0.25 MAX OPTIon 1 (DATUM A) 2X0.25 MAX oPtion 1 13 4 1.00±0.05 4.00 FULL R 74.20MN 4.00M|N 4.00±0.10 (DATUM A) 2X RO.25 MAX OPTION 2 4\|D3 1.00士0.05 DETAIL Z JEDEC SOLID STATE PRODUCT OUTLINE Copyright⊙2014 JEDEC 2X 1.10 MIN FLAT SURFACE △△w20 4X R3.00 MIN 4.00±0.10 (4XR065) 3 134X0.75MAX OPTION 1 10 OPTION 13 2X 1.10 MIN FLAT SURFACE 2X1.75- 54X200MN 4X R3.00 MIN 4.00±0.10 (4XRO.65) A3 13 4X RO. 75 MAX OPTIoN 2 -4X3.00M|N DETAIL W JEDEC SOLID STATE PRODUCT OUTLINE Copyright⊙2014 JEDEC TABLE 1 COMMON DIMENSIONS SYMBOLMIN MAXNOTES Al 6.00 BASIC A2 4.00 5,7 A3 17.90 18.00 18.10 D3 1.375BAS|C 4 D4 125 NOTES REF 14-146 SSUE TABLE 2 DIMM TYPE VARIATIONS VARIATION XXXA NOTES SYMBOL VDDR4 SODIMM D1 36.30BAS|C D2 65.60BAS|C D5 3.50 BASIC D6 69.60 e1 35.50BAS|c e2 28.50BAS|C N 260 NOTES 2,3 REF 14-161 ISSUE JEDEC SOLID STATE PRODUCT OUTLINE Copyright⊙2014 JEDEC TABLE 3 MODULE HEIGHT VARIATIONS VARIATION A: XXX BXXX C XXX SYMBOL V A MIN 29.85 NOM 30.00 MAX 30.15 NOTES 2,3 REF 14-146 ISSUE TABLE 4 MODULE THICKNESS VARIA TIONS VARIATION XXX XXX X CXX SYMBOL MAX MAX MAX 3.70 4.70 E1 1.20 1.70 E2 1.20 70 NOTES 5 REF 4-146 ISSUE JEDEC SOLID STATE PRODUCT OUTLINE Copyright⊙2014 JEDEC NON-METALIZED DEFINITION OUTER LAYERS OPTIONAL CHAMFER/RADII DE TAIL NOT SHOWN DETAIL W COMPONENT AREA FRONT) l COMPONENT AREA BACK NON-METALIZED AREA /12 4X14.00MAX 4X2.00MN 4X1.00M|N DETAIL W JEDEC SOLID STATE PRODUCT OUTLINE Copyright⊙2014 JEDEC NON-METALIZED DEFINITION ALL INNER LAYERS OPTIONAL CHAMFER/RADII DE TAIL NOT SHOWN DETAIL V (FRONT SURFACE O (BACK SURFACE) 4X1.75M|N NON-METALIZED AREA /12 4X0.50MN DE TAIL∨ JEDEC SOLID STATE PRODUCT OUTLINE Copyright⊙2014 JEDEC NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y145-2009 2. TOLERANCES ON ALL DIMENSIONS +0. 15 UNLESS OTHERWISE SPECIFIED 3. ALL DIMENSIONS ARE MM 4 THE POSITION OF THE NOTCH IDENTIFIES THE OPERATIONAL VOL TAGE: 1.2 VOLTS THE JC-45 COMMITTEE CON TROLS THIS INFORMATION IT S SHOWN HERE FOR REFERENCE ONLY. AND SUBJECT TO CHANGE DIMENSIONS APPLICABLE WHEN COMP ONENTS MOUNTED ON BOTH SIDES PCB THICKNESS NOT TO BE EXCEEDED OUTSIDE OF COMPONENT AREA 6 CARD THICKNESS APPLIES ACROSS TABS AND INCLUDES PLATING AND/ OR METALIZED AREAS 7 BORDER OF COMPONENT AREA 8 EDGE OF CONTACT PADS AND TIE BARS, IF PRESENT, SHALL BE FREE OF BURRS 9\ THE(R0.65)DIMENSION IS FOR REFERENCE ONLY. THE 1. 10MM MIN FLAT SURFACE AND THE 2X 1.75 CONTROL THE FEATURE APPLICATION NOTES 10\ THE ADDITION OF THIS BEVEL IS A FABRICATION OPTION AND IS NOT REQUIRED THE BEVEL S NOT TO HIT THE PLATED CONTACTS 11 RECOMMENDED PLATING FOR CONTACT PADS ARE 1)VARIATION XXAX: GOLD PLATING 0.76 MICROMETERS MINIMUM OVER 2.00 MICROMETERS MINIMUM NICKEL 2)VARIATION XXBX: GOLD PLATING 0.05 MICROMETERS MINIMUM OVER 0.25 MICROMETERS MINIMUM PALLADIUM OVER 2.00 MICROMETERS MINIMUM NICKEL 3)VARIATION XXCX: GOLD PLATING 0.05 MICROMETERS MINIMUM OVER 2.00 MICROMETERS MINIMUM NICKEL MODULE PLATING RECOMMENDATIONS TESTED PER INDUSTRY STANDARD EIA 364-1000 RELIABILITY TESTING REQUIRES TEST MODULE, CONNECTOR, AND IDENTIFICATION OF TEST CONDITIONS 12METALIZED'IS DEFINED AS ANY METAL SURFACE THAT HAS A RETURN PATH TO POWER SUPPLY OR GROUND. THROUGH A COMPONENT OR CONDUCTIVE PLANE VCC OR VDD BLIND OR PLATED THROUGH HOLE(PTH), AS WELL AS NARROW OR WIDE TRACES ANY SURFACE METALS SUCH AS CONNECTOR PIN IDEN TIFICATION, PCB VENDER CODE, ETC THAT DO NOT HAVE A METALS AS A RETURN PATH ARE ACCEP TABLE NON-METALIZED IS DEFINED AS THE OPPOSITE TO METALIZED AND DOES NOT INCLUDE ANY METAL OR CONDUCTIVE ELEMENTS THAT MAY CAUSE ELECTRICAL SHORT CIRCUIT HOWE VER. ANY SURFACE METALS SUCH AS CONNECTOR PIN DENTIFICATION. PCB VENDOR NAME OR CODE. ETC. THAT DOES NOT HAVE CONDUCTIVE RETURN PATH TO VCC OR VDD IS ACCEPTABI JEDEC SOLID STATE PRODUCT OUTLINE Copyright⊙2014 JEDEC 13\ OPTION AL CHAMFER OR RADIUS JEDEC SOLID STATE PRODUCT OUTLINE Copyright⊙2014 JEDEC
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