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博文链接：https://lanxinyuchs.iteye.com/blog/1912248AN2606
Contents
7.4 Important considerations
7. 5 Bootloader version
30
STM32F205215xx, and stm32F207217xx bootloader
31
8.1 Bootloader v2.x
8.1.1 Bootloader configuration
8.1.2 Bootloader hardware requirements
.32
8.1.3 Bootloader selection
33
8.1.4 Important considerations
35
8.1.5 Bootloader v2.x versions
8.2 Bootloader v3.x
37
8.2.1 Bootloader configuration
8.2.2 Bootloader hardware requirements
39
8.2.3 Bootloader selection
0
8.2.4 Important considerations
8.2.5 Bootloader version V3.x
44
Device-dependent bootloader parameters ......,..
45
Bootloader timing characteristics
46
10.1 USART bootloader timing characteristics
46
10.2 USB bootloader timing characteristics
5
Revision history
53
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List of tables
AN2606
List of tables
Table 1. Boot pin configuration
8
Table 2
Embedded bootloaders
Table 3. STM32F10XXx configuration in System memory boot mode
10
Table 4
STM32F10xXx bootloader versions
12
Table 5. STM32F105XX/107xX configuration in System memory boot mode
Table 6. STM32F105xx and sTM32F107xx bootloader versions
18
Table 7. Boot pin and BFB2 bit configuration
,,,,,20
Table 8. STM32F10XXX XL-density configuration in System memory boot mode
Table 9. XL-density bootloader versions
..25
Table 10. StM32L 1 5xXx configuration in System memory boot mode
26
Table 11. sTm32L15xxx bootloader versions
30
Table 12. STM32F2XX configuration in System memory boot mode
31
Table 13. STM32F2XX Voltage Range configuration using bootloader v2.X
36
Table 14 stM32F2xx bootloader v2 x version
36
Table 15. STM32F2XX configuration in System memory boot mode
...37
Table 16. STM32F2XX Voltage Range configuration using bootloader V3.X
,,,,,,,,44
Table 17. sTM32F2xx bootloader v3.x versions
44
Table 18. Bootloader device-dependant parameters
Table 19. UsaRT bootloader timings for low/medium/high -density and
value line devices
,,,,,47
Table 20. USART bootloader timings for XL-density line devices
48
Table 21. USaRT bootloader timings for connectivity line devices(PA9 pin low)
USART bootloader timings for connectivity line devices(P Aa nlOs ow
49
Table 23. USaRT bootloader timings for STM32L15XX medium-density
ultralow power devices
50
Table 24. USArT bootloader timings for stm32 F205/215xx and
STM32F207 /217xx devices
50
Table 25. USB minimum timings for connectivity line devices
52
Table 26. USB minimum timings for StM32 F205/215Xx
and stm32F207/217xx devices
■
2
Table 27. Document revision history
53
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List of fiqures
List of figures
Figure 1. Bootloader for STM32F10XXX with USART1
Figure 2. Bootloader selection for STM32F105xX and STM32F107XX devices
17
Figure 3. Bootloader selection for STM32 F10XXX XL-density devices
,,24
Figure 4. Bootloader selection for STM32L15XXX devices
.28
Figure 5. Bootloader V2.x selection for STM32F2XX
..34
Figure 6. Bootloader V3. x selection for STM32F2X
42
Figure 7. USART bootloader timing waveforms
,,,,,,,,,,47
Figure 8. USB bootloader timing waveforms
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Related documents
AN2606
Related documents
allthedocumentsmentionedbelowareavailablefromwww.st.com
Datasheets
LoW, medium and high-density sTM32F101xx and sTM32F103xX datasheets
LoW, medium and high-density StM32F100xx and stM32 F102XX datasheets
STM32 F 1 05XX/107xx connectivity line datasheet
XL-density STM32F101xx and STM32F103XX datasheets
STM32L15 1 xx and sTM32F152xx datasheet
STM32F205XX STM32F207xx and sTM32F215xx STM32F217xx datasheets
Reference manuals
STM32F101xX, STM32F102XX STM32F103xx and STM32F105xX/107xX
reference manual(RMo008)
LoW, medium and high-density STM32F100xX value line reference manual
(RM0041)
STM32L151xx and STM32L152xx advanced ARM-based 32-bit mcus reference
manual(RM0038
STM32F205xX. STM32F207xX, STM32F215xx and STM32F217xx advanced
ARM-based 32-bit MCUs reference manual(RM00033)
Flash programming manuals
STM32F101XX. STM32F102xX STM32F103xx and sTM32F105Xx/107xX Flash
programming manual ( PMo042)
LoW, medium and high-density STM32F100xx value line Flash programming
manual(PM0063)
XL-density STM32F101 xx and stM32F103xX Flash programming manual
PM0068
STM32L151xx and STM32L152XX Flash programming manual(PMo062)
STM32F205XX. STM32F207xX STM32F215xx and STM32 F217xX Flash
programming manual (PM0059)
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Glossary
Glossary
OW-density devices are stm32F101xX, stM32F102xx and stm32F103XX
microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes
Medium-density devices are STM32F101XX, STM32F102Xx and STM32F103XX
microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes
High-density devices are STM32F101xx and stM32F103XX microcontrollers where the
Flash memory density ranges between 256 and 512 Kbytes
Connectivity line devices are STM32F105XX and STM32F107Xx microcontrollers
OW-density value line devices are STM32F100XX microcontrollers where the Flash
memory density ranges between 16 and 32 Kbytes
Medium-density value line devices are STM32F100xX microcontrollers where the Flash
memory density ranges between 64 and 128 Kbytes
High-density value line devices are STM32F100XX microcontrollers where the lash
memory density ranges between 256 and 5128 Kbytes
XL-density devices are STM32F101xx and STM32F103xX microcontrollers where the
Flash memory density ranges between 768 Kbytes and 1 Mbyte
Medium-density ultralow power devices are STM32L15xx microcontrollers where the
Flash memory density ranges between 64 and 128 Kbytes
STM32F2xXx devices are stm32F215xx STM32F205xX STM32F207xx and
SMT32F217xX microcontrollers with a Flash memory density ranging from 128 to
1024 Kbytes
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General bootloader description
AN2606
3
General bootloader description
Bootloader activation
The bootloader is automatically activated by configuring the BOOTo and BOOt1 pins in the
specific"System memory"configuration(see Table 1)and then by applying a reset
Depending on the used pin configuration, the Flash memory, system memory or SRAM is
selected as the boot space, as shown in Table 1 below
Table 1. Boot pin configuration
Boot mode selection pins
Boot mode
Aliasing
BOOT1
BOOTO
0
User Flash memory User Flash memory is selected as the boot space
0
System memory
System memory is selected as the boot space
Embedded SRAM Embedded SRAM is selected as the boot space
Table 1 shows that the STM32 microcontrollers enter the System memory boot mode if the
BOOT pins are configured as follows
BOOT0=1
BOOT=0
The values on the BOoT pins are latched on the fourth rising edge of SYSClK after a reset
3.2
Exiting System memory boot mode
System memory boot mode must be exited in order to start execution of the application
program. This can be done by applying a hardware reset During reset, the BOot pins
BOOTO and BOoT1)must be set at the proper levels to select the desired boot mode(see
Table 1). Following the reset, the CPU starts code execution from the boot memory located
at the bottom of the memory address space starting from 0x0000 0000
Bootloader identification
Depending on the STM32 device used, the bootloader may support one or more embedded
serial peripherals used to download the code to the internal Flash memory. The bootloader
identifier(ID)provides information about the supported serial peripherals
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General bootloader description
For a given STM32 device, the bootloader is identified by means of the
Bootloader(protocol) version: version of the serial peripheral USART, CAN, USB
etc. ) communication protocol used in the bootloader. This version can be retrieved
using the bootloader Get Version command
2. Bootloader identifier(ID): version of the STM32 device bootloader, coded on one byte
the oxxy format where.
X specifies the embedded serial peripheral(s)used by the device bootloader
X=1: only one USART is used
X=2: tWo USARTs are used
X=3: tWo USARTs, one can and dfu are used
Y specifies the device bootloader version
Let us take the example of a bootloader ID equal to OX10. This means that it is the
first version of the device bootloader that uses only one USART
The bootloader ID is programmed in the last two bytes of the device system
memory and can be read by using the bootloader"Read memory command or by
direct access to the system memory via JTAG/SWD
The table below provides identification information about the bootloader embedded in
STM32 devices
Table 2. Embedded bootloaders
Bootloader D
Bootloader
Device
Supported serial peripherals
(protocol)
ID Memory locationversion
Low-density
USART
NA
NA
USART (V2.2)
Medium-densityUSART1
NA
SART(V2.2)
High-density
USART1
NA
NA
USART (V2.2)
USART1/USART2 (remapped
USART
Connectivity lineCAN2(remapped)/DFU(USB
NA
NA
V221)
Device
CAN (V2.0)
DFU(V2.0
Medium-density
√1.0
value line
USART1
Ox1FFFF7D6 USART(V2. 2)
USART1
value line
v100×1FFD6 USART(22
XL-density
USART1/USART2(remapped)
V2.1
0×1FFFF7D6 USART30)
Medium-density
ultralow power USART1/USART2
V2.0 0x1 FF0OFFE USART (V3.0)
USART 1/USART3
V2.0 0x1FFF77DE USART (V3.0)
STM32F2XXX
USART(V3.O)
devices
USART1/USART3/CAN2/DFU
(USB Device FS)
V3.2Ox1 CAN(V2.0)/
DFU(2.1)
1. For connectivity line devices, the USART bootloader returns v2.0 instead of v2.2 for the protocol version
For more details please refer to the" STM32F105XX and STM32F107Xx revision Z errata sheet available
omwww.st.com
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STM32F101XX, STM32F102XX, STM32F103XX, medium-density and high-density value line boot
STM32F101XX STM32F102XX STM32F103XX
medium-density and high-density value line
bootloader
Throughout this section STM32F10xXX will be used to refer to low-density, medium-density
high-density STM32F101xx and STM32F103Xx devices, to low-and medium-density
STM32F102xx devices and to medium and high-density value line devices
Bootloader configuration
The bootloader embedded in STM32F10xxx devices supports only one interface: the
USART1
The following table shows the required STM32F1 0XXX hardware resources used by the
bootloader in System memory boot mode
Table 3. STM32F10xXX configuration in System memory boot mode
Feature/Peripheral
State
Comment
Clock source
HSI enabled The system clock is equal to 24 MHz using the PLL
USART1 RX pin Input
PA10 pin: USART1 receives
USART1 TX pin
utput
PA9 pin USART1 transmits
SysTick timer
Enabled
Used to automatically detect the serial baud rate from the host.
USART1
Enabled
Once initialized the UsART1 configuration is: 8-bits, even parity
and 1 Stop bit
RAM
512 bytes starting from address 0x2000 0000 are used by the
bootloader firmware
2 Kbytes starting from address ox1 FFF F000, contain the
System memory
bootloader firmware
The independent watchdog(WDg) prescaler is configured to its
IWDG
maximum value and is periodically refreshed to prever
watchdog reset (in case the hardware IWDG option was
previously enabled by the user)
The system clock is derived from the embedded internal high-speed RC, no external quartz
is required for the bootloader code
After downloading the application binary, if you choose to execute the Go command, the
peripheral registers used by the bootloader (shown in the above table) are not initialized to
their default reset values betore jumping to the user application They should be
reconfigured in the user application if they are used. So, if the lWDG is being used in the
application, the WDG prescaler value has to be adapted to meet the requirements of the
application(since the prescaler was set to its maximum value by the bootloader)
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