zynq-ultrascale器件选型资料2019最新zynq-ultrascale-plus-pr

文件名称: zynq-ultrascale器件选型资料2019最新

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详细说明：zynq-ultrascale-plus-product-selection-guide 器件选型资料2019年最新更新Zynga UltraScalet TM MPSoCs: CG Block Diagram Processing System Application Processing Unit Memory System High-Speed unctions Connectivity ARM③ NEON CortexTM-A53 DDR4/3/3L Floating Point Unit LPDDR4/3 Multichannel dma 32KB 32KB 32/64-Bit W/ ECC - Cache‖D- Cache‖ Management Trace W/Parity W/ECC Unit Macrocell Timers 256KB OCM with Ecc WDT Resets Clocking Debug G|C-400 SCU CCl/SMMU 1MB L2 W/ECC Real-Time Processing Unit Platform Configuration and GeneralConnectivity Vector Floating Management Uni Security Unit ARM Point unit System Config AES CortexTM-R5 Memory Protection Management Decryption Authentication 128KB 32KB I-Cache 32KB D-Cache Power Secure boot TCM W/ECC W/ECC W/ECC Management Voltage/Temp Functional Monito GIC Safety Trustzone Programmable Logic System Monitor Storage Signal Processing Block rAm General-Purpose 1/0 High-Speed Connectivity UltraRAM High-Performance HP I/O GTH DSP High-Density HD /0 PCle Gen 3 ⅩLINX Zynga Ultra Scale+ TM MPSoCs: CG Devices Device Name(l) Zu2c ZU3CG ZU4CG ZU5CG ZU6CG ZU7CG ZU9CG Application Processor core Dual-core ARM CortexTM-A53 MP Core TM up to 1.3GHZ Processor unit Memory W/ECC L1 Cache 32KB l/d per core, L2 Cache 1MB, on-chip Memory 256KB 2Real-Time Processor core Dual-core ARM Cortex -R5 MPCore up to 533MHZ E Processor Unit Memory W/ECC L1 Cache 32KB l/d per core, Tightly Coupled memory 128KB per core External Memory Dynamic Memory Interface X32/x64: DDR4, LPDDR4, DDR3, DDR3L, LPDDR3 with ECC Static Memory Interfaces NAND, 2x Quad-SPl s Connectivity High-Speed Connectivity PCle Gen2 X4, 2X USB3.0, SATA 3. 1, Display Port, 4x Tri-mode Gigabit Ethernet General Connectivity 2XUSB 2.0, 2X SD/SDIO, 2X UART, 2X CAN 2.0B, 2x 12C, 2x SPL, 4x 32b GPIO aIntegrated Block Power Management Full / Low /PL/ Battery Power domains RSA. AES, and sha Functionality Security AMS-System Monitor 10-bit, 1MSPS- Temperature and Voltage monitor PS to PL Interface 12 x 32/ 64/128b AXI Ports System Logic Cells(K) 103 154 192 256 469 504 600 Programmable CLB Flip-Flops( K) 94 141 176 234 429 461 548 Functionality CLB LUTS(K) 47 71 88 117 215 230 274 Max Distributed RAM(Mb) 1.2 1.8 2.6 3.5 6.9 6.2 8.8 eMemory Total Block RAM(Mb) 5.3 6 4.5 25.1 11.0 32.1 UltraRAM(Mb) 13.5 18.0 27.0 cLocking Clock Management Tiles(CMTs) 3 4 8 DSP Slices 240 360 728 1,248 1,973 728 2,520 PCI Express Gen 3x16 2 2 E Integrated IP 150G Interlaken 100G Ethernet MAC/PCS W/RS-FEC AMS-System Monitor 1 1 1 GTH 163Gb/s Transceivers 16 16 24 24 24 Transceivers GTY 32.75Gb/s Transceivers Extended(2) 2-2L Speed grades Industrial -1-1L-2 ⅩLINX Zyngo Ultra Scale+ TM MPSoCs: EG Block Diagram Processing System Application Processing Unit Memory Graphics Processing Unit High-Speed ARM MaliTM-400 MP2 Connectivity ARM③ NEON TM Cortex TM-A53 Floating point Uni DDR4/3/3L LPDDR4/3 Geometry Processor Processor 32/64-Bit W/ECC I-Cache D-Cache agement W/Parity W/ECC Macrocell 256KB OCM Memory Management Unit with ecc G|C-400 SCU CCUSMMU 1MB L2 W/ECC 64KB L2 Cache General Connectivity Real-Time Processing Unit Platform Configuration and System Vector Floating Management Unit Security Unit Functions ARM Point Unit System Config aes CortexTM-R5 Memory protection Management Decrypt Multichannel dma Authentication 128KB 32KB I-Cache 32KB D-Cache PoWe Secure boot TCM W/ECC W/ECC ECC Management Voltage/Tem Timers Monitor WDT Resets Functional GIC Clocking debl Safety Trustzone Programmable Logic High-Speed Connectivity System Monitor Interlaken Storage& Signal Processing GTH Block ram General-Purpose /0 GTY UltraRAM High-Performance HP I/O 100G EMAC DSP High-Density HD l/0 PCle Gen 3 ⅩLINX Zynga Ultra Scale+ TM MPSOCS: EG Devices Device name ZU2Eg ZU3Eg ZU4Eg ZU5Eg ZU6Eg ZU7eg Zu9Eg Zu11EG ZU15EG ZU17EG ZU19EG Application Processor core Quad-core ARM CortexTM-A53 MPCore TM up to 1.5GHZ Processor unit Memory W/ECC L1 Cache 32KB l/d per core, L2 Cache 1MB, on-chip Memory 256KB Real-Time Processor core Dual-core aRm cortex R5 MPCore Tm up to 600MHz Processor unit Memory W/ECC L1 Cache 32KB l /D per core, Tightly Coupled Memory 128KB per core E Graphic Video Graphics Processing Unit MaliTM-400 MP2 up to 667MHZ t Acceleration Memory L2 Cache 64KB Dynamic memory Interface x32/x64: DDR4, LPDDR4, DDR3, DDR3L, LPDDR3 with ECC bo External Memory Static Memory Interfaces NAND, 2x Quad-SPI Connectivity High-Speed Connectivity PCle Gen2 x4, 2X USB3.0, SATA 3. 1, Display Port, 4x Tri-mode Gigabit Ethernet General Connectivity 2XUSB 2.0, 2X SD/SDIO, 2X UART, 2X CAN 2.0B, 2x 12C, 2x SPL, 4x 32b GPIO Power Management Integrated block Full /Low/PL/Battery Power domains Securit RSA, AES, and sha Functionality AMS-System Monitor 10-bit, 1MSPS-Temperature and voltage monitor PS to Pl Interface 12 32/ 64/128b AXI Ports System Logic Cel(K)1031541922564695046006537479261,143 Programmable Functionality CLBF| ip-Flops(K)941411762344294615485976828471045 CLB LUTS(K)477188117215230274299341423523 Max Distributed RAM(Mb) 1.2 1.8 2.6 3.5 6.9 6.2 8.8 9.1 11.3 8.0 9.8 Memory Total block ram(Mb)537.64.55.125111.032121.126.228.0346 UltraRAM(Mb 13.518.0 27.0 22.531.528.736.0 o Clocking Clock Management Tiles(CMTs)3344 8 4 8 11 DSP Slices2403607281,2481,9731,7282,5202,9283,5281,5901,968 PCI Express gen 3x16 4 E Integrated IP 150G Interlaken 4 100G Ethernet MAC/PCS W/RS-FEC 4 AMS-System Monitor 1 1 GTH 16.3Gb/s Transceivers 16 16 24 24 24 32 24 44 44 Transceivers GTY 32. 75Gb/s Transceivers 16 28 28 Extended(2) -1-2-2L -1-2-2L-3 -1-2-2L-3 Speed Grades Industria 1-1L-2 ⅩLINX Zynga UltraScalet TM MPSoCs: EV Block Diagram Processing System Application Processing Unit Memory Graphics Processing Unit High-Speed ARM MaliITM-400 MP2 Connectivity ARM③ NEONTM CorteXTM-A53 DDR4/3/3L Geometr Pixel Floating point Unit LPDDR4/3 Processor Processor 32KB P M Embedded 32/64 bit W/ECC Cache‖ D-Cache‖ Management Trace W/Parity W/ECC Unit Macrocell 256KB OCM Memory Management Unit with ecc G|C-400 SCU‖ CCI/SMMU 1MB L2 W/ECC 64KB L2 Cache General Connectivity Real-Time Processing Unit Platform Configuration and System Vector Floating Management Unit Security Unit Functions ARM Point unit System Config aes CorteX TM-R5 Memory Protection Management Decryption Unit Multichannel dma authenticate 128KB 32KB I-Cache 32KB D-Cache Power Secure Boot TCM W/ECC W/ECC W/ECC Management Voltage/Temp Timers WDT Resets Functional Monitor GIC Safety Clocking Debug Trustzone Programmable Logic System Monito Storage& Signal Processing Block rAm General-Purpose 1/0 High-Speed Connectivity Video codec UltraRAM High-Performance HP 1/0 GTH H.265H.264 DSP High-Density HD 70 PCle gen 3 ⅩLINX Zynga Ultra Scale+ TM MPSoCS: EV Devices Device name ZU4EV ZU5EV ZU7EV Application Processor core Quad-core ARM CortexTM-A53 MP Core TM up to 1.5GHZ Processor unit Memory W/ECC L1 Cache 32KB l /d per core, L2 Cache 1MB, on-chip Memory 256KB Real-Time Processor core Dual-core ARM Cortex -R5 MPCore TM up to 600MHz Processor unit Memory W/ECC L1 Cache 32KB l /d per core, Tightly Coupled Memory 128KB per core E Graphic Video Graphics Processing Unit MaliTM-400 MP2 up to 667MHz Acceleration Memory L2 Cache 64KB Dynamic memory Interface x32/ x64: DDR4, LPDDR4, DDR3, DDR3L, LPDDR3 with ECC bo External Memory Static Memory Interfaces NAND, 2x Quad-SPI 8 Connectivity High-Speed Connectivity PCle Gen2 x4, 2X USB3.0, SATA 3. 1, Display Port, 4 Tri-mode gigabit Ethernet General Connectivity 2XUSB 2.0, 2X SD/SDIO, 2X UART, 2X CAN 2.0B, 2x 12C, 2X SPL, 4x 32b GPIO Integrated block Power Management Full /Low /Pl/Battery Power Domains RSA, AES, and sha Functionality Security AMS -System Monitor 10-bit, 1MSPS-Temperature and Voltage monitor PS to PL Interface 12 x 32/64/128b AXI Ports 192 256 504 Programmable System Logic Cells(K CLB Flip-Flops(k) 176 234 461 Functionality CLB LUTS (K) 88 117 230 Max Distributed RAM(N 2.6 3.5 6.2 Memory Total Block RAM(Mb 4.5 5.1 11.0 UltraRAM(Mb) 3.5 18.0 27.0 bo Clocking Clock Management Tiles (cmts) 4 8 DSP Slices 728 1,248 1,728 Video Codec Unit(VCU) 1 PCI Express gen 3x16 2 2 2 E Integrated IP 150G Interlaken g 100G Ethernet MAC/PCS W/RS-FEC AMS- System Monitor 1 1 GTH 16.3Gb/s Transceivers 16 16 24 Transceivers GTY 32.75Gb/s Transceivers Extended 1-2-2L-3 Speed Grades Industria 1-1L-2 ⅩLINX Zynga UItraScale+ TM MPSoCs PS l/Os(1),3. 3V High-Density(HD)l/0, 1.8V High-Performance(HP)I/Os PS-GTR 6Gb/s, GTH 163Gb/, GTY 32.75Gb/s Pkg Dimensions Footprint(2,3)(mm) ZU2 ZU3 ZU4 ZU5 ZUo ZU7 ZU9 ZU11 ZU15 ZU17 ZU19 170.24,58170.24,58 A484(4) 19X19 4,0,0 4,0,0 A6254) 170,24,156170,24,156 21X21 4,0,0 4,0,0 C78445 21496,156214,96,156214,96,156214,96,156 23x23 4,0,0 4,0.0 4,4,0 4,4,0 B900 31x31 214,48,156214,48,156 21448,156 4,16,0 4,16,0 C900 214,48,156 214,48,156 214,48,156 31X31 4,16,0 4,16,0 4,16,0 B1156 214,120,208 214,120,208 35X35 214,120,208 4,24,0 4,24,0 4,24,0 C1156 214,48,312 214,48,312 35X35 4,20,0 4,20,0 B1517 214,72,416 40X40 214,72,572214,72,572 4,16,0 4,16,0 4,16,0 F1517 214,48,416 40×40 214,48,416 4,24,0 4,32,0 214,96,416214,96,416 C1760 42.5X42.5 214,96,416 4,32,16 4,32,16 4,32,16 214,48,260214,48,260 D1760 42.5×42.5 4,44,284,44,28 45X45 214,96,572214,96,572 E1924 4,44,0 4,44,0 Important:Verifyalldatainthisdocumentwiththedevicedatasheetsfoundatwww.xilinx.com E XILINX Zynga Ultra Scale+ TM MPSoc The Zyng Ultra Scale+ family provides footprint compatibility to enable users to migrate designs from one device to another any two packages with the same footprint identifier code(last letter and number sequence) are footprint compatible UltraScale+ TM ⅩLINX

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